LFEC1E-4QN208I Lattice, LFEC1E-4QN208I Datasheet - Page 13
LFEC1E-4QN208I
Manufacturer Part Number
LFEC1E-4QN208I
Description
IC FPGA 1.5KLUTS 208PQFP
Manufacturer
Lattice
Datasheet
1.LFECP15E-5FN256C.pdf
(163 pages)
Specifications of LFEC1E-4QN208I
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC1E-4QN208I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 13 of 163
- Download datasheet (2Mb)
Lattice Semiconductor
grammed during configuration or can be adjusted dynamically. In dynamic mode, the PLL may lose lock after
adjustment and not relock until the t
allows the user to adjust the phase and duty cycle of the CLKOS output.
The sysCLOCK PLLs provide the ability to synthesize clock frequencies. Each PLL has four dividers associated
with it: input clock divider, feedback divider, post scalar divider and secondary clock divider. The input clock divider
is used to divide the input clock signal, while the feedback divider is used to multiply the input clock signal. The post
scalar divider allows the VCO to operate at higher frequencies than the clock output, thereby increasing the fre-
quency range. The secondary divider is used to derive lower frequency outputs.
Figure 2-11. PLL Diagram
Figure 2-12 shows the available macros for the PLL. Table 2-5 provides signal description of the PLL Block.
Figure 2-12. PLL Primitive
CLKFB
(PLL internal),
from clock net
(CLKOP) or
from a user
clock (PIN or logic)
from CLKOP
(from routing or
external pin)
CLKI
RST
CLKFB
CLKI
Input Clock
Divider
(CLKI)
EPLLB
Feedback
(CLKFB)
Divider
LOCK
Dynamic Delay Adjustment
CLKOP
LOCK
parameter has been satisfied. Additionally, the phase and duty cycle block
Adjust
Delay
DDAIDEL[2:0]
DDA MODE
Controlled
Oscillator
DDAILAG
2-10
Voltage
DDAIZR
VCO
CLKFB
CLKI
RST
Post Scalar
(CLKOP)
Divider
EHXPLLB
LatticeECP/EC Family Data Sheet
Phase/Duty
Secondary
(CLKOK)
Divider
CLKOP
CLKOS
CLKOK
LOCK
DDAOZR
DDAOLAG
DDAODEL[2:0]
Select
Clock
Architecture
LOCK
CLKOS
CLKOP
CLKOK
Related parts for LFEC1E-4QN208I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 112 IO 1.2 V -4 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 67 IO 1.2V -4 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 112 IO 1.2 V -4 Spd
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 97 IO 1.2V -4 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA LatticeEC Family 1500 Cells 378MHz 130nm (CMOS) Technology 1.2V 144-Pin TQFP
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 112I/O 208-PQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
IC FPGA 1.5KLUTS 100TQFP
Manufacturer:
Lattice
Datasheet: