LFEC3E-4TN100C Lattice, LFEC3E-4TN100C Datasheet - Page 55
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFEC3E-4TN100C
Manufacturer Part Number
LFEC3E-4TN100C
Description
IC FPGA 3.1KLUTS 100TQFP
Manufacturer
Lattice
Datasheet
1.LFECP15E-5FN256C.pdf
(163 pages)
Specifications of LFEC3E-4TN100C
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-4TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
EBR Memory Timing Diagrams
Figure 3-8. Read/Write Mode (Normal)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-9. Read/Write Mode with Input and Output Registers
CLKA
DOA (Regs)
WEA
DOA
CSA
ADA
DIA
CLKA
WEA
ADA
CSA
DIA
t
SU
A0
D0
t
t
H
SU
A0
D0
t
H
Mem(n) data from previous read
A1
D1
A1
D1
3-19
output is only updated during a read cycle
A0
t
A0
CO_EBR
t
COO_EBR
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
D0
A1
A1
t
CO_EBR
D0
D1
A0
A0
t
CO_EBR
t
COO_EBR
D1
D0
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