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NuMicro™ NUC130/NUC140 Technical Reference Manual NuMicro™ NUC100 Series NUC130/NUC140 Technical Reference Manual The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. Nuvoton is providing this ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Contents CONTENTS............................................................................................................................................. 2 FIGURES................................................................................................................................................. 7 1 GENERAL DESCRIPTION ....................................................................................................... 12 2 FEATURES ............................................................................................................................... 13 2.1 NuMicro™ NUC130 Features – Automotive Line.......................................................... 13 2.2 NuMicro™ NUC140 Features – Connectivity Line ........................................................ 17 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.1 Overview ......................................................................................................................150 5.4.2 Features .......................................................................................................................150 5.4.3 Block Diagram ..............................................................................................................151 5.4.4 Function Description.....................................................................................................152 5.4.5 Register and Memory Map ...........................................................................................156 5.4.6 Register Description .....................................................................................................158 5.5 General Purpose I/O (GPIO) ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.10.1 Overview ....................................................................................................................307 5.10.2 Features .....................................................................................................................307 5.10.3 Block Diagram ............................................................................................................308 5.10.4 Function Description...................................................................................................309 5.10.5 Register Map ..............................................................................................................312 5.10.6 Register Description ...................................................................................................314 5.11 Watchdog Timer (WDT).............................................................................................. 323 5.11.1 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.16.1 Overview ....................................................................................................................466 5.16.2 Features .....................................................................................................................466 5.16.3 Block Diagram ............................................................................................................467 5.16.4 Functional Description ................................................................................................468 5.16.5 Register Map ..............................................................................................................474 5.16.6 Register Description ...................................................................................................475 5.17 Analog Comparator (CMP) ......................................................................................... 489 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 7.2.1 NuMicro™ NUC130/NUC140 DC Electrical Characteristics..........................................553 7.3 AC Electrical Characteristics ...................................................................................... 557 7.3.1 External 4~24 MHz High Speed Oscillator ...................................................................557 7.3.2 External 4~24 MHz High Speed Crystal .......................................................................557 7.3.3 External ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Figures Figure 3-1 NuMicro™ NUC100 Series selection code ................................................................... 22 Figure 3-2 NuMicro™ NUC130 LQFP 100-pin Pin Diagram .......................................................... 23 Figure 3-3 NuMicro™ NUC130 LQFP 64-pin Pin Diagram ............................................................ 24 Figure 3-4 NuMicro™ NUC130 LQFP ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2 Figure 5-26 Time-out Count Block Diagram ......................................................................... 202 Figure 5-27 Legend for the following five figures ......................................................................... 213 Figure 5-28 Master Transmitter Mode ......................................................................................... 214 Figure 5-29 Master Receiver Mode.............................................................................................. 215 Figure ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Figure 5-62 SPI Timing in Slave Mode ........................................................................................ 288 Figure 5-63 SPI Timing in Slave Mode (Alternate Phase of SPICLK) ......................................... 289 Figure 5-64 Timer Controller Block Diagram ............................................................................... 308 Figure 5-65 Clock Source of ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Figure 5-98 FIFO contents for various I Figure 5-99 ADC Controller Block Diagram ................................................................................. 467 Figure 5-100 ADC Converter Self-Calibration Timing Diagram ................................................... 468 Figure 5-101 ADC Clock Control.................................................................................................. 469 Figure 5-102 Single Mode Conversion ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Tables Table 1-1 Connectivity Supported Table........................................................................................ 12 Table 5-1 Address Space Assignments for On-Chip Controllers................................................... 52 Table 5-2 Exception Model ............................................................................................................ 94 Table 5-3 System Interrupt Map..................................................................................................... 95 Table 5-4 Vector Table Format ...................................................................................................... 96 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 1 GENERAL DESCRIPTION The NuMicro™ NUC100 Series is 32-bit microcontrollers with embedded ARM for industrial control and applications which need rich communication interfaces. The Cortex™-M0 ® is the newest ARM embedded processor with 32-bit performance ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2 FEATURES The equipped features are dependent on the product line and their sub products. 2.1 NuMicro™ NUC130 Features – Automotive Line • Core ® ARM Cortex™-M0 core runs MHz – One ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Support 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter – Independent clock source for each timer – Provides one-shot, periodic, toggle and continuous counting operation modes – Support event counting ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2 • two sets device – Master/Slave mode – Bidirectional data transfer between masters and slaves – Multi-master bus (no central master) – Arbitration between simultaneously transmitting ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Support PDMA mode – • Analog Comparator Up to two analog comparator – External input or internal bandgap voltage selectable at negative node – Interrupt when compare result change – Power down wake-up – • ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2.2 NuMicro™ NUC140 Features – Connectivity Line • Core ® ARM Cortex™-M0 core runs MHz – One 24-bit system timer – Supports low power sleep mode – Single-cycle 32-bit hardware multiplier – ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Provides one-shot, periodic, toggle and continuous counting operation modes – Support event counting function – Support input capture function – • Watchdog Timer Multiple clock sources – 8 selectable time out period from 1.6ms ~ ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2 • two sets device – Master/Slave mode – Bidirectional data transfer between masters and slaves – Multi-master bus (no central master) – Arbitration between simultaneously transmitting ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Support byte write in 16-bit data width mode – • ADC 12-bit SAR ADC with 700K SPS – 8-ch single-end input or 4-ch differential input – Single scan/single cycle scan/continuous scan – Each ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 3 PARTS INFORMATION LIST AND PIN CONFIGURATION 3.1 NuMicro™ NUC130 Products Selection Guide 3.1.1 NuMicro™ NUC130 Automotive Line Selection Guide ISP Data Part number APROM RAM Loader I/O Flash ROM NUC130LC1CN ...
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... NuMicro™ NUC140 Connectivity Line Selection Guide ISP Data Part number APROM RAM Loader I/O Flash ROM NUC140LC1CN 4x32-bit NUC140LD2CN 4x32-bit NUC140LE3CN 128 Definable 4x32-bit NUC140RC1CN 4x32-bit NUC140RD2CN 4x32-bit NUC140RE3CN 128 Definable 4x32-bit NUC140VE3CN 128 Definable 4x32-bit NUC 1 0 ARM-Based ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 3.3 Pin Configuration 3.3.1 NuMicro™ NUC130/NUC140 Pin Diagram ™ 3.3.1.1 NuMicro NUC130 LQFP 100 pin AD8/ADC5/PA.5 76 AD7/ADC6/PA.6 77 AD6/ADC7/SPISS21/PA.7 78 Vref 79 AVDD 80 SPISS20/PD.0 81 SPICLK2/PD.1 82 MISO20/PD.2 83 MOSI20/PD.3 84 MISO21/PD.4 85 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.3.1.2 NuMicro NUC130 LQFP 64 pin AD8/ADC5/PA.5 49 AD7/ADC6/PA.6 50 AD6/ADC7/PA.7 51 AVDD 52 AD5/CPN0/PC.7 53 AD4/CPP0/PC.6 54 AD3/CPN1/PC.15 55 AD2/CPP1/PC.14 56 T0EX/INT1/PB.15 57 XT1_OUT 58 XT1_IN 59 /RESET 60 VSS 61 VDD 62 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.3.1.3 NuMicro NUC130 LQFP 48 pin Figure 3-4 NuMicro™ NUC130 LQFP 48-pin Pin Diagram Publication Release Date: June 14, 2011 - 25 - Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.3.1.4 NuMicro NUC140 LQFP 100 pin AD8/ADC5/PA.5 76 AD7/ADC6/PA.6 77 AD6/ADC7/SPISS21/PA.7 78 Vref 79 AVDD 80 SPISS20/PD.0 81 SPICLK2/PD.1 82 MISO20/PD.2 83 MOSI20/PD.3 84 MISO21/PD.4 85 MOSI21/PD.5 86 AD5/CPN0/PC.7 87 AD4/CPP0/PC.6 88 AD3/CPN1/PC.15 89 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.3.1.5 NuMicro NUC140 LQFP 64 pin AD8/ADC5/PA.5 49 AD7/ADC6/PA.6 50 AD6/ADC7PA.7 51 AVDD 52 AD5/CPN0/PC.7 53 AD4/CPP0/PC.6 54 AD3/CPN1/PC.15 55 AD2/CPP1/PC.14 56 T0EX/INT1/PB.15 57 XT1_OUT 58 XT1_IN 59 /RESET 60 VSS 61 VDD 62 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.3.1.6 NuMicro NUC140 LQFP 48 pin Figure 3-7 NuMicro™ NUC140 LQFP 48-pin Pin Diagram Publication Release Date: June 14, 2011 - 28 - Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 3.4 Pin Description 3.4.1 NuMicro™ NUC130/NUC140 Pin Description ™ 3.4.1.1 NuMicro NUC130 Pin Description Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 PE.15 2 PE.14 3 PE.13 PB. ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PD.8 I/O 13 SPISS30 I/O PD.9 I/O 14 SPICLK3 I/O PD.10 I/O 15 MISO30 I/O PD.11 I/O 16 MOSI30 I/O PD.12 I/O 17 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 PE.8 I/O 31 PE.7 I/O PB.0 I RXD0 I PB.1 I TXD0 O PB.2 I/O RTS0 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PC.2 I MISO00 I/O I2SDI I PC.1 I SPICLK0 I/O I2SBCLK I/O PC.0 I/O SPISS00 I/O 45 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PC.13 I/O 56 MOSI11 I/O PC.12 I/O 57 MISO11 I/O PC.11 I MOSI10 I/O PC.10 I MISO10 I/O PC.9 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 AVSS AP PA.0 I ADC0 AI PA.1 I ADC1 AI AD12 I/O PA.2 I/O ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 SPICLK2 I/O PD.2 I/O 83 MISO20 I/O PD.3 I/O 84 MOSI20 I/O PD.4 I/O 85 MISO21 I/O PD.5 I/O 86 MOSI21 I/O PC.7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 PS2DAT I/O 98 PS2CLK I PVSS P PB.8 I/O 100 64 48 STADC TM0 I/O Note: Pin Type I=Digital ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual ™ 3.4.1.2 NuMicro NUC140 Pin Description Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 PE.15 2 PE.14 3 PE.13 PB. /INT0 SPISS31 PB. CPO1 AD1 PB.12 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 SPICLK3 I/O PD.10 I/O 15 MISO30 I/O PD.11 I/O 16 MOSI30 I/O PD.12 I/O 17 MISO31 I/O PD.13 I/O 18 MOSI31 I/O PB.4 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 RXD0 I PB.1 I TXD0 O PB.2 I/O RTS0 nWRL O T2EX I PB.3 I/O CTS0 I ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PC.1 I SPICLK0 I/O I2SBCLK I/O PC.0 I/O SPISS00 I I2SLRCL I PE.6 I/O PE.5 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 MISO11 I/O PC.11 I MOSI10 I/O PC.10 I MISO10 I/O PC.9 I SPICLK1 I/O PC.8 I/O 61 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PA.1 I ADC1 AI AD12 I/O PA.2 I ADC2 AI AD11 I/O PA.3 I ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PD.3 I/O 84 MOSI20 I/O PD.4 I/O 85 MISO21 I/O PD.5 I/O 86 MOSI21 I/O PC.7 I CPN0 AI AD5 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Pin No. Pin Name Pin Type LQFP LQFP LQFP 100 64 48 PB.8 100 64 48 STADC TM0 Note: Pin Type I=Digital Input, O=Digital Output; AI=Analog Input; P=Power Pin; AP=Analog Power 4 BLOCK DIAGRAM 4.1 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 4.1.2 NuMicro™ NUC140 Block Diagram Figure 4-2 NuMicro™ NUC140 Block Diagram Publication Release Date: June 14, 2011 - 45 - Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5 FUNCTIONAL DESCRIPTION ® 5.1 ARM Cortex™-M0 Core The Cortex™-M0 processor is a configurable, multistage, 32-bit RISC processor. It has an AMBA AHB-Lite interface and includes an NVIC component. It also has optional hardware debug ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual (WFE) instructions, or the return from interrupt sleep-on-exit feature NVIC that features: 32 external interrupt inputs, each with four levels of priority Dedicated Non-Maskable Interrupt (NMI) input. Support for both level-sensitive and pulse-sensitive interrupt lines ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2 System Manager 5.2.1 Overview System management includes these following sections: System Resets System Memory Map System management registers for Part Number ID, chip reset and on-chip controllers reset , multi-functional pin control System Timer ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.3 System Power Distribution In this chip, the power distribution is divided into three segments. Analog power from AVDD and AVSS provides the power for analog components operation. Digital power from VDD and VSS supplies ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 12-bit AVDD SAR-ADC AVSS Analog Comparator Low Brown Voltage Out Reset Detector Temperature FLASH Seneor External PLL 32.768 kHz Crystal Figure 5-3 NuMicro™ NUC130 Power Distribution Diagram NUC130 Power Distribution Internal Digital Logic 22.1184 MHz ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.4 System Memory Map NuMicro™ NUC100 Series provides 4G-byte addressing space. The memory locations assigned to each on-chip controllers are shown in the following table. The detailed register definition, memory space, and programming detailed will ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0x400D_0000 – 0x400D_3FFF ACMP_BA 0x400E_0000 – 0x400E_FFFF ADC_BA APB2 Controllers Space (0x4010_0000 ~ 0x401F_FFFF) 0x4010_0000 – 0x4010_3FFF PS2_BA 0x4011_0000 – 0x4011_3FFF TMR23_BA 0x4012_0000 – 0x4012_3FFF I2C1_BA 0x4013_0000 – 0x4013_3FFF SPI2_BA 0x4013_4000 – 0x4013_7FFF SPI3_BA 0x4014_0000 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.5 System Manager Control Registers R: read only, W: write only, R/W: both read and write Register Offset R/W GCR_BA = 0x5000_0000 GCR_BA+0x00 R PDID GCR_BA+0x04 R/W RSTSRC GCR_BA+0x08 R/W IPRSTC1 GCR_BA+0x0C R/W IPRSTC2 GCR_BA+0x18 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Part Device ID Code Register (PDID) Register Offset R/W Description GCR_BA+0x00 R Part Device Identification Number Register PDID [1] Each part number has a unique default reset value ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual System Reset Source Register (RSTSRC) This register provides specific information for software to identify this chip’s reset source from last operation. Register Offset R/W Description GCR_BA+0x04 R/W System Reset Source Register RSTSRC ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual reset from LVR Software can write 1 to clear this bit to zero. The RSTS_WDT flag is set by the “reset signal” from the watchdog timer to indicate the previous reset source. ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Peripheral Reset Control Register1 (IPRSTC1) Register Offset R/W Description GCR_BA+0x08 R/W IP Reset Control Register 1 IPRSTC1 Reserved Bits Descriptions [31:4] Reserved Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual CHIP one shot reset (write-protection bit) Setting this bit will reset the whole chip, including CPU kernel and all peripherals, and this bit will automatically return to 0 after the 2 clock cycles. The CHIP_RST ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Peripheral Reset Control Register2 (IPRSTC2) Setting these bits 1 will generate asynchronous reset signals to the corresponding IP controller. Users need to set these bits release corresponding IP controller from reset state ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PWM47 controller Reset [21 PWM47 controller reset PWM47_RST 0 = PWM47 controller normal operation PWM03 controller Reset [20 PWM03 controller reset PWM03_RST 0 = PWM03 controller normal operation [19] Reserved Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 = Timer3 controller normal operation Timer2 controller Reset [ Timer2 controller reset TMR2_RST 0 = Timer2 controller normal operation Timer1 controller Reset [ Timer1 controller reset TMR1_RST 0 = Timer1 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Brown-Out Detector Control Register (BODCR) Partial of the BODCR control registers values are initiated by the flash configuration and partial bits are write-protected bit. Programming write-protected bits needs to write “59h”, “16h”, “88h” to address ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual “88h” to address 0x5000_0100 to disable register protection. Reference the register REGWRPROT at address GCR_BA+0x100. Brown-Out Detector Interrupt Flag 1 = When Brown-Out Detector detects the VDD is dropped down through the voltage of BOD_VL ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Temperature Sensor Control Register (TEMPCR) Register Offset R/W Description GCR_BA+0x1C R/W Temperature Sensor Control Register TEMPCR Bits Descriptions [31:1] Reserved Reserved Temperature sensor ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Power-On-Reset Control Register (PORCR) Register Offset R/W Description GCR_BA+0x24 R/W Power-On-Reset Controller Register PORCR Bits Descriptions [31:16] Reserved Reserved The register is used ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Multiple Function Pin GPIOA Control Register (GPA_MFP) Register Offset R/W Description GCR_BA+0x30 R/W GPIOA Multiple Function and Input Type Control Register GPA_MFP Bits ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 1 PA.12 Pin Function Selection The pin function depends on GPA_MFP12 and EBI_HB_EN[5] (ALT_MFP[21]) and EBI_EN (ALT_MFP[11]). EBI_HB_EN[5] [12] GPA_MFP12 PA.11 Pin Function Selection The pin function depends on GPA_MFP11 and EBI_EN ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PA.5 Pin Function Selection The pin function depends on GPA_MFP5 and EBI_HB_EN[0] (ALT_MFP[16]) and EBI_EN (ALT_MFP[11]). EBI_HB_EN[0] [5] GPA_MFP5 PA.4 Pin Function Selection The pin function depends on GPA_MFP4 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 1 PA.0 Pin Function Selection 1 = The ADC0 (Analog-to-Digital converter channel 0) function is selected to the pin [0] GPA_MFP0 PA The GPIOA[0] is selected to the pin PA AD12 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Multiple Function Pin GPIOB Control Register (GPB_MFP) Register Offset R/W Description GCR_BA+0x34 R/W GPIOB Multiple Function and Input Type Control Register GPB_MFP Bits ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PB.12 Pin Function Selection The pin function depends on GPB_MFP12 and PB12_CLKO (ALT_MFP[10]) and EBI_EN (ALT_MFP[11]). EBI_EN [12] GPB_MFP12 PB.11 Pin Function Selection The pin function depends on GPB_MFP11 and PB11_PWM4 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual The pin function depends on GPB_MFP6 and EBI_EN (ALT_MFP[11]). EBI_EN PB. 5 Pin Function Selection [ The UART1 TXD function is selected to the pin PB.5 GPB_MFP5 0 = The ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Multiple Function Pin GPIOC Control Register (GPC_MFP) Register Offset R/W Description GCR_BA+0x38 R/W GPIOC Multiple Function and Input Type Control Register GPC_MFP Bits ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PC.11 Pin Function Selection 1 = The SPI1 MOSI0 (master output, slave input pin-0) function is selected to the pin [11] GPC_MFP11 PC. The GPIOC[11] is selected to the pin PC.11 PC.10 Pin ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Bits PC3_I2SDO (ALT_MFP[8]) and GPC_MFP[3] determine the PC.3 function. PC3_I2SDO PC.2 Pin Function Selection Bits PC2_I2SDI (ALT_MFP[7]) and GPC_MFP[2] determine the PC.2 function. PC2_I2SDI [2] GPC_MFP2 PC.1 Pin Function ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Multiple Function Pin GPIOD Control Register (GPD_MFP) Register Offset R/W Description GCR_BA+0x3C R/W GPIOD Multiple Function and Input Type Control Register GPD_MFP Bits ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PD. The GPIOD[10] is selected to the pin PD.10 PD.9 Pin Function Selection [ The SPI3 SPICLK function is selected to the pin PD.9 GPD_MFP9 0 = The GPIOD[9] is selected ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Multiple Function Pin GPIOE Control Register (GPE_MFP) Register Offset R/W Description GCR_BA+0x40 R/W GPIOE Multiple Function and Input Type Control Register GPE_MFP Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Alternative Multiple Function Pin Control Register (ALT_MFP) Register Offset R/W Description GCR_BA+0x50 R/W Alternative Multiple Function Pin Control Register ALT_MFP Reserved EBI_nWRH_E EBI_nWRL_E Reserved N N ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 1 Bits GPB_MFP15 and PB15_T0EX (ALT_MFP[24]) determine the PB.15 function. PB15_T0EX [24] 0 PB15_T0EX 0 1 EBI_HB_EN is use to switch GPIO function to EBI address/data bus high byte (AD[15:8]), EBI_HB_EN, EBI_EN and corresponding ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual EBI_HB_EN[ Bits EBI_HB_EN[1], EBI_EN and GPA_MFP[4] determine the PA.4 function. EBI_HB_EN[1] [17] 0 EBI_HB_EN[ Bits EBI_HB_EN[0], EBI_EN and GPA_MFP[5] determine the PA.5 function. EBI_HB_EN[0] 0 [16] EBI_HB_EN[ [15] ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual EBI_EN EBI_EN EBI_EN EBI_EN EBI_EN EBI_EN GPIO 1 ADC5 (ADC) ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual EBI_EN EBI_EN EBI_EN EBI_EN EBI_EN Bits PB12_CLKO, GPB_MFP[12] and EBI_EN (ALT_MFP[11]) determine the PB.12 function. EBI_EN 0 [10] PB12_CLKO ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 1 Bits PC3_I2SDO and GPC_MFP[3] determine the PC.3 function. PC3_I2SDO [8] 0 PC3_I2SDO 0 1 Bits PC2_I2SDI and GPC_MFP[2] determine the PC.2 function. PC2_I2SDI 0 [7] PC2_I2SDI 0 1 Bits PC1_I2SBCLK and GPC_MFP[1] determine ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Bits PB9_S11 and GPB_MFP[9] determine the PB.9 function. PB9_S11 [1] 0 PB9_S11 0 1 Bits PB10_S01 and GPB_MFP[10] determine the PB.10 function. PB10_S01 0 [0] PB10_S01 GPIO ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register Write-Protection Control Register (REGWRPROT) Some of the system control registers need to be protected to avoid inadvertent write and disturb the chip operation. These system control registers are protected after the power on reset ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual BODCR: address 0x5000_0018 PORCR: address 0x5000_0024 PWRCON: address 0x5000_0200 (bit[6] is not protected for power wake-up interrupt clear) APBCLK bit[0]: address 0x5000_0208 (bit[0] is watchdog clock enable) CLKSEL0: address 0x5000_0210 (for HCLK and CPU STCLK ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.6 System Timer (SysTick) The Cortex-M0 includes an integrated system timer, SysTick. SysTick provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The counter can be used as a Real Time ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.6.1 System Timer Control Register Map R: read only, W: write only, R/W: both read and write Register Offset R/W SCS_BA = 0xE000_E000 SCS_BA+0x10 R/W SYST_CSR SCS_BA+0x14 R/W SYST_RVR SCS_BA+0x18 R/W SYST_CVR Description SysTick Control ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.6.2 System Timer Control Register Description SysTick Control and Status (SYST_CSR) Register Offset R/W SCS_BA+0x10 R/W SYST_CSR Reserved Bits Descriptions [31:17] Reserved Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual SysTick Reload Value Register (SYST_RVR) Register Offset R/W Description SCS_BA+0x14 R/W SysTick Reload Value Register SYST_RVR Bits Descriptions [31:24] Reserved Reserved [23:0] Value ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual SysTick Current Value Register (SYST_CVR) Register Offset R/W Description SCS _BA+0x18 R/W SysTick Current Value Register SYST_CVR Bits Descriptions [31:24] Reserved Reserved Current ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.7 Nested Vectored Interrupt Controller (NVIC) Cortex-M0 provides an interrupt controller as an integral part of the exception mode, named as “Nested Vectored Interrupt Controller (NVIC)” closely coupled to the processor kernel and ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.7.1 Exception Model and System Interrupt Map Table 5-2 lists the exception model supported by NuMicro™ NUC100 Series. Software can set four levels of priority on some of these exceptions as well as on all ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 26 10 TMR2_INT 27 11 TMR3_INT 28 12 UART02_INT 29 13 UART1_INT 30 14 SPI0_INT 31 15 SPI1_INT 32 16 SPI2_INT 33 17 SPI3_INT 34 18 I2C0_INT 35 19 I2C1_INT 36 20 CAN0_INT 37 21 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.7.2 Vector Table When any interrupts is accepted, the processor will automatically fetch the starting address of the interrupt service routine (ISR) from a vector table in memory. For ARMv6-M, the vector table base address ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.7.4 NVIC Control Registers R: read only, W: write only, R/W: both read and write Register Offset R/W SCS_BA = 0xE000_E000 SCS_BA+0x100 R/W NVIC_ISER SCS_BA+0x180 R/W NVIC_ICER SCS_BA+0x200 R/W NVIC_ISPR SCS_BA+0x280 R/W NVIC_ICPR SCS_BA+0x400 R/W ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ0 ~ IRQ31 Set-Enable Control Register (NVIC_ISER) Register Offset R/W Description SCS _BA+0x100 R/W IRQ0 ~ IRQ31 Set-Enable Control Register NVIC_ISER Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ0 ~ IRQ31 Clear-Enable Control Register (NVIC_ICER) Register Offset R/W Description SCS _BA+0x180 R/W IRQ0 ~ IRQ31 Clear-Enable Control Register NVIC_ICER Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ0 ~ IRQ31 Set-Pending Control Register (NVIC_ISPR) Register Offset R/W Description SCS _BA+0x200 R/W IRQ0 ~ IRQ31 Set-Pending Control Register NVIC_ISPR Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ0 ~ IRQ31 Clear-Pending Control Register (NVIC_ICPR) Register Offset R/W Description SCS _BA+0x280 R/W IRQ0 ~ IRQ31 Clear-Pending Control Register NVIC_ICPR Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ0 ~ IRQ3 Interrupt Priority Register (NVIC_IPR0) Register Offset R/W Description SCS _BA+0x400 R/W IRQ0 ~ IRQ3 Interrupt Priority Control Register NVIC_IPR0 PRI_3 PRI_2 PRI_1 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ4 ~ IRQ7 Interrupt Priority Register (NVIC_IPR1) Register Offset R/W Description SCS _BA+0x404 R/W IRQ4 ~ IRQ7 Interrupt Priority Control Register NVIC_IPR1 PRI_7 PRI_6 PRI_5 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ8 ~ IRQ11 Interrupt Priority Register (NVIC_IPR2) Register Offset R/W Description SCS _BA+0x408 R/W IRQ8 ~ IRQ11 Interrupt Priority Control Register NVIC_IPR2 PRI_11 PRI_10 PRI_9 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ12 ~ IRQ15 Interrupt Priority Register (NVIC_IPR3) Register Offset R/W Description SCS _BA+0x40C R/W IRQ12 ~ IRQ15 Interrupt Priority Control Register NVIC_IPR3 PRI_15 PRI_14 PRI_13 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ16 ~ IRQ19 Interrupt Priority Register (NVIC_IPR4) Register Offset R/W Description SCS _BA+0x410 R/W IRQ16 ~ IRQ19 Interrupt Priority Control Register NVIC_IPR4 PRI_19 PRI_18 PRI_17 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ20 ~ IRQ23 Interrupt Priority Register (NVIC_IPR5) Register Offset R/W Description SCS _BA+0x414 R/W IRQ20 ~ IRQ23 Interrupt Priority Control Register NVIC_IPR5 PRI_23 PRI_22 PRI_21 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ24 ~ IRQ27 Interrupt Priority Register (NVIC_IPR6) Register Offset R/W Description SCS _BA+0x418 R/W IRQ24 ~ IRQ27 Interrupt Priority Control Register NVIC_IPR6 PRI_27 PRI_26 PRI_25 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ28 ~ IRQ31 Interrupt Priority Register (NVIC_IPR7) Register Offset R/W Description SCS _BA+0x41C R/W IRQ28 ~ IRQ31 Interrupt Priority Control Register NVIC_IPR7 PRI_31 PRI_30 PRI_29 7 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.7.5 Interrupt Source Control Registers Besides the interrupt control registers associated with the NVIC, NuMicro™ NUC100 Series also implement some specific control registers to facilitate the interrupt functions, including “interrupt source identification”, ”NMI source selection” ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual IRQ22_SRC INT_BA+0x58 R IRQ22 (Reserved) interrupt source identity IRQ23_SRC INT_BA+0x5C R IRQ23 (USBD) interrupt source identity IRQ24_SRC INT_BA+0x60 R IRQ24 (PS/2) interrupt source identity IRQ25_SRC INT_BA+0x64 R IRQ25 (ACMP) interrupt source identity IRQ26_SRC INT_BA+0x68 R ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Interrupt Source Identity Register (IRQn_SRC) Register Offset R/W Description IRQ0 (BOD) interrupt source identity INT_BA+0x00 …….. R : IRQn_SRC INT_BA+0x7C IRQ31 (RTC) interrupt source identity ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual [3:0] INT_BA+0x1C 7 [2:0] INT_BA+0x20 8 [2:0] INT_BA+0x24 9 [2:0] INT_BA+0x28 10 [2:0] INT_BA+0x2C 11 [2:0] INT_BA+0x30 12 [2:0] INT_BA+0x34 13 [2:0] INT_BA+0x38 14 [2:0] INT_BA+0x3C 15 [2:0] INT_BA+0x40 16 [2:0] INT_BA+0x44 17 [2:0] INT_BA+0x48 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual [2:0] INT_BA+0x4C 19 [2:0] INT_BA+0x50 20 [2:0] INT_BA+0x54 21 [2:0] INT_BA+0x58 22 [2:0] INT_BA+0x5C 23 [2:0] INT_BA+0x60 24 [2:0] INT_BA+0x64 25 [2:0] INT_BA+0x68 26 [2:0] INT_BA+0x6C 27 [2:0] INT_BA+0x70 28 [2:0] INT_BA+0x74 29 [2:0] INT_BA+0x78 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual NMI Interrupt Source Select Control Register (NMI_SEL) Register Offset R/W Description INT_BA+0x80 R/W NMI source interrupt select control register NMI_SEL Reserved Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual MCU Interrupt Request Source Register (MCU_IRQ) Register Offset R/W Description INT_BA+0x84 R/W MCU Interrupt Request Source Register MCU_IRQ Bits Descriptions MCU IRQ Source ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.2.8 System Control Register Cortex-M0 status and operating mode control are managed by System Control Registers. Including CPUID, Cortex-M0 interrupt priority and Cortex-M0power management can be controlled through these system control register For more detailed ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual CPUID Register (CPUID) Register Offset R/W Description SCS_BA+0xD00 R CPUID Register CPUID Reserved PARTNO[3:0] Bits Descriptions [31:24] Implementer code assigned by ARM. ( ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Interrupt Control State Register (ICSR) Register Offset R/W Description SCS_BA+0xD04 R/W Interrupt Control and State Register ICSR NMIPENDSE Reserved ISRPREEMP ISRPENDING VECTPENDING[3: ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 1 = removes the pending state from the PendSV exception. This is a write only bit. When you want to clear PENDSV bit, you must “write 0 to PENDSVSET and write 1 to PENDSVCLR” at ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Application Interrupt and Reset Control Register (AIRCR) Register Offset R/W Description SCS_BA+0xD0C R/W Application Interrupt and Reset Control Register AIRCR Reserved Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual System Control Register (SCR) Register Offset R/W Description SCS_BA+0xD10 R/W System Control Register SCR Reserved Bits Descriptions [31:5] Reserved Reserved Send Event on ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual System Handler Priority Register 2 (SHPR2) Register Offset R/W Description SCS_BA+0xD1C R/W System Handler Priority Register 2 SHPR2 PRI_11 Bits Descriptions Priority of ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual System Handler Priority Register 3 (SHPR3) Register Offset R/W Description SCS_BA+0xD20 R/W System Handler Priority Register 3 SHPR3 PRI_15 PRI_14 Bits Descriptions Priority ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3 Clock Controller 5.3.1 Overview The clock controller generates the clocks for the whole chip, including system clocks and all peripheral clocks. The clock controller also implements the power control function with the individually clock ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Figure 5-4 Clock generator global view diagram - 126 - Publication Release Date: June 14, 2011 Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.2 Clock Generator The clock generator consists of 5 clock sources which are listed below: One external 32.768 kHz low speed crystal One external 4~24 MHz high speed crystal One programmable PLL FOUT(PLL source consists ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.3 System Clock and SysTick Clock The system clock has 5 clock sources which were generated from clock generator block. The clock source switch depends on the register HCLK_S (CLKSEL0[2:0]). The block diagram is showed ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.4 Peripherals Clock The peripherals clock had different clock source switch setting which depends on the different peripheral. Please refer the CLKSEL1 and CLKSEL2 register description in 5.3.7. 5.3.5 Power Down Mode Clock When chip ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.6 Frequency Divider Output This device is equipped a power-of-2 frequency divider which is composed by16 chained divide- by-2 shift registers. One of the 16 shift register outputs selected by a sixteen to one multiplexer ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.7 Register Map R: read only, W: write only, R/W: both read and write Register Offset R/W CLK_BA = 0x5000_0200 CLK_BA+0x00 R/W PWRCON CLK_BA+0x04 R/W AHBCLK CLK_BA+0x08 R/W APBCLK CLKSTATUS CLK_BA+0x0C R/W CLK_BA+0x10 R/W CLKSEL0 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.3.8 Register Description Power Down Control Register (PWRCON) Except the BIT[6], all the other bits are protected, program these bits need to write “59h”, “16h”, “88h” to address 0x5000_0100 to disable register protection. Reference the ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual mode, if the peripheral clock source is from external 32.768 kHz low speed crystal or the internal 10 kHz low speed oscillator Chip enter the power down mode instant or wait CPU sleep ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register/Instruction PWR_DOWN_EN PD_WAIT_CPU Mode Normal operation 0 Idle mode 0 (CPU entry sleep mode) Power down mode 1 Power down mode 1 (CPU entry deep sleep mode) Table 5-5 Power Down Mode Control Table When ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual AHB Devices Clock Enable Control Register (AHBCLK) These bits for this register are used to enable/disable clock for system clock PDMA clock and EBI clock. Register Offset R/W Description CLK_BA+0x04 R/W AHB Devices Clock Enable ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual APB Devices Clock Enable Control Register (APBCLK) These bits of this register are used to enable/disable clock for peripheral controller clocks. Register Offset R/W Description CLK_BA+0x08 R/W APB Devices Clock Enable Control Register APBCLK 31 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 = Disable PWM67 clock PWM_45 Clock Enable [22 Enable PWM45 clock PWM45_EN 0 = Disable PWM45 clock PWM_23 Clock Enable [21 Enable PWM23 clock PWM23_EN 0 = Disable PWM23 clock ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 = Disable I [7] Reserved Reserved Frequency Divider Output Clock Enable [ Enable FDIV Clock FDIV_EN 0 = Disable FDIV Clock Timer3 Clock Enable [ Enable Timer3 Clock TMR3_EN 0 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Clock status Register (CLKSTATUS) These bits of this register are used to monitor if the chip clock source stable or not, and whether clock switch failed. Register Offset R/W Description CLKSTATUS CLK_BA+0x0C R/W Clock status ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual External 32.768 kHz Low Speed Crystal Clock Source Stable Flag 1 = External 32.768 kHz low speed crystal clock is stable [1] XTL32K_STB 0 = External 32.768 kHz low speed crystal clock is not stable ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Clock Source Select Control Register 0 (CLKSEL0) Register Offset R/W Description CLK_BA+0x10 R/W Clock Source Select Control Register 0 CLKSEL0 Reserved Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 111 = Clock source from internal 22.1184 MHz high speed oscillator clock Clock Source Select Control Register 1(CLKSEL1) Before clock switching, the related clock sources (pre-select and new-select) must be turned on. Register Offset R/W ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual TIMER3 clock source select 000 = Clock source from external 4~24 MHz high speed crystal clock [22:20] 001 = Clock source from external 32.768 kHz low speed crystal clock TMR3_S 010 = Clock source from ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Clock Source Select Control Register 2 (CLKSEL2) Before clock switching, the related clock sources (pre-select and new-select) must be turned on. Register Offset R/W Description CLK_BA+0x1C R/W Clock Source Select Control Register 2 CLKSEL2 31 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 01 = Clock source from PLL clock 10 = Clock source from HCLK 11 = Clock source from internal 22.1184 MHz high speed oscillator clock - 145 - Publication Release Date: June 14, 2011 Revision ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Clock Divider Register (CLKDIV) Register Offset R/W Description CLK_BA+0x18 R/W Clock Divider Number Register CLKDIV Reserved USB_N Bits Descriptions [31:24] Reserved Reserved ADC ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual PLL Control Register (PLLCON) The PLL reference clock input is from the external 4~24 MHz high speed crystal clock input or from the internal 22.1184 MHz high speed oscillator. These registers are use to control ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Refer to the formulas below the table. Output Clock Frequency Setting NF = × × FOUT FIN NR Constraint: < < MHz FIN 150 FIN < < 2. 800 KHz 8 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Frequency Divider Control Register (FRQDIV) Register Offset R/W Description CLK_BA+ 24 R/W Frequency Divider Control Register FRQDIV Reserved Bits Descriptions [31:5] Reserved Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4 USB Device Controller (USB) 5.4.1 Overview There is one set of USB 2.0 full-speed device controller and transceiver in this device compliant with USB 2.0 full-speed device specification and support control/bulk/interrupt/ isochronous ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.3 Block Diagram Figure 5-10 USB Block Diagram Publication Release Date: June 14, 2011 - 151 - Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.4 Function Description 5.4.4.1 SIE (Serial Interface Engine) The SIE is the front-end of the device controller and handles most of the USB packet protocol. The SIE typically comprehends signaling up to the transaction level. ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.4.5 Interrupt This USB provides 1 interrupt vector with 4 interrupt events (WAKEUP, FLDET, USB and BUS). The WAKEUP event is used to wake-up the system clock when the power down mode is enabled. (The ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual mode. Furthermore, a user can write 0 into USB_ATTR[4] to turn off PHY under special circumstances like suspend to save power. 5.4.4.7 Buffer Control There is 512 bytes SRAM in the controller and the 6 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.4.8 Handling Transactions with USB Device Peripheral User can use interrupt or polling USB_INTSTS to monitor the USB Transactions, when transactions occur, USB_INTSTS will be set by hardware and send an interrupt request to CPU ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Figure 5-14 Data Out Transfer 5.4.5 Register and Memory Map R : read only write only, R/W : both read and write Register Offset R/W USB_BA = 0x4006_0000 USB_BA+0x000 R/W USB_INTEN USB_BA+0x004 R/W ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB_BA+0x064 R/W Endpoint 4 Maximal Payload Register USB_MXPLD4 USB_BA+0x068 R/W Endpoint 4 Configuration Register USB_CFG4 USB_BA+0x06C R/W Endpoint 4 Set Stall and Clear In/Out Ready Control Register 0x0000_0000 USB_CFGP4 USB_BUFSEG5 USB_BA+0x070 R/W Endpoint 5 Buffer ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.4.6 Register Description USB Interrupt Enable Register (USB_INTEN) Register Offset R/W USB_BA+0x000 R/W USB_INTEN INNAK_EN Reserved Bits Descriptions [31:16] Reserved Reserved Active NAK ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 0 = Disable USB event interrupt Bus Event Interrupt Enable [ Enable BUS event interrupt BUS_IE 0 = Disable BUS event interrupt Publication Release Date: June 14, 2011 - 159 - Revision V2.01 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB Interrupt Event Status Register (USB_INTSTS) This register is USB Interrupt Event Status register; clear by write ‘1’ to the corresponding bit. Register Offset R/W Description USB_BA+0x004 R/W USB Interrupt Event Status Register USB_INTSTS 31 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Endpoint 1’s USB Event Status 1 = USB event occurred on Endpoint 1, check USB_EPSTS[13:11] to know which [17] kind of USB event was occurred, cleared by write 1 to USB_INTSTS[17] or EPEVT1 USB_INTSTS[1] 0 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB Device Function Address Register (USB_FADDR) A seven-bit value uses as the address of a device on the USB BUS. Register Offset R/W Description USB_BA+0x008 R/W USB Device Function Address Register USB_FADDR ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB Endpoint Status Register (USB_EPSTS) Register Offset R/W Description USB_BA+0x00C R USB Endpoint Status Register USB_EPSTS Reserved EPSTS5[0] EPSTS4[2: EPSTS2[1: OVERRUN Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 011 = Setup ACK 111 = Isochronous transfer end Endpoint 2 Bus Status These bits are used to indicate the current status of this endpoint 000 = In ACK 001 = In NAK [16:14] EPSTS2 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB Bus Status and Attribution Register (USB_ATTR) Register Offset R/W Description USB_BA+0x010 R/W USB Bus Status and Attribution Register USB_ATTR Reserved USB_EN Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 1 = Bus no any response more than 18 bits time time out read only bit. Resume Status 1 = Resume from suspend [2] RESUME bus ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Floating detection Register (USB_FLDET) Register Offset R/W Description USB_BA+0x014 R USB Floating Detected Register USB_FLDET Bits Descriptions [31:1] Reserved Reserved Device Floating Detected ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Buffer Segmentation Register (USB_BUFSEG) For Setup token only. Register Offset R/W Description USB_BA+0x018 R/W Setup Token Buffer segmentation Register USB_BUFSEG BUFSEG[7:3] Bits Descriptions ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Buffer Segmentation Register (BUFSEGx 0~5 Register Offset R/W Description USB_BUFSEG0 USB_BA+0x020 R/W Endpoint 0 Buffer Segmentation Register USB_BUFSEG1 USB_BA+0x030 R/W Endpoint 1 Buffer Segmentation Register USB_BUFSEG2 USB_BA+0x040 R/W Endpoint 2 Buffer Segmentation Register ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Maximal Payload Register (USB_MXPLDx 0~5 Register Offset R/W Description USB_BA+0x024 R/W Endpoint 0 Maximal Payload Register USB_MXPLD0 USB_BA+0x034 R/W Endpoint 1 Maximal Payload Register USB_MXPLD1 USB_BA+0x044 R/W Endpoint 2 Maximal Payload Register USB_MXPLD2 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Configuration Register (USB_CFGx 0~5 Register Offset R/W Description USB_BA+0x028 R/W Endpoint 0’s Configuration Register USB_CFG0 USB_BA+0x038 R/W Endpoint 1’s Configuration Register USB_CFG1 USB_BA+0x048 R/W Endpoint 2’s Configuration Register USB_CFG2 USB_BA+0x058 R/W Endpoint 3’s ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Isochronous Endpoint This bit is used to set the endpoint as Isochronous endpoint, no handshake. [4] ISOCH 1 = Isochronous endpoint Isochronous endpoint Endpoint Number [3:0] EP_NUM These bits are used to ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Extra Configuration Register (USB_CFGPx 0~5 Register Offset R/W Description USB_BA+0x02C R/W Endpoint 0 Set Stall and Clear In/Out Ready Control Register 0x0000_0000 USB_CFGP0 USB_BA+0x03C R/W Endpoint 1 Set Stall and Clear In/Out Ready ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual USB Drive SE0 Register (USB_DRVSE0) Register Offset R/W Description USB_BA+0x090 R/W Force USB PHY to drive SE0 USB_DRVSE0 Bits Descriptions [31:1] Reserved Reserved ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.5 General Purpose I/O (GPIO) 5.5.1 Overview NuMicro™ NUC130/NUC140 has General Purpose I/O pins can be shared with other function pins; it depends on the chip configuration. These 80 pins are arranged ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.5.3 Function Description 5.5.3.1 Input Mode Explanation Set GPIOx_PMD (PMDn[1:0]) to 00b the GPIOx port [n] pin is in Input mode and the I/O pin is in tri-state (high impedance) without output drive capability. The ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.5.3.3 Open-Drain Mode Explanation Set GPIOx_PMD (PMDn[1:0]) to 10b the GPIOx port [n] pin is in Open-Drain mode and the digital output function of I/O pin supports only sink current capability, an additional pull-up register ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.5.4 Register Map R: read only, W: write only, R/W: both read and write Register Offset R/W GP_BA = 0x5000_4000 GP_BA+0x000 R/W GPIOA_PMD GP_BA+0x004 R/W GPIOA_OFFD GP_BA+0x008 R/W GPIOA_DOUT GPIOA_DMASK GP_BA+0x00C R/W GP_BA+0x010 R GPIOA_PIN ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register Offset R/W Description GP_BA+0x09C R/W GPIO Port C Interrupt Enable GPIOC_IEN GP_BA+0x0A0 R/W GPIO Port C Interrupt Source Flag GPIOC_ISRC GP_BA+0x0C0 R/W GPIO Port D Pin I/O Mode Control GPIOD_PMD GP_BA+0x0C4 R/W GPIO Port ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register Offset R/W Description GPIOA8_DOUT GP_BA+0x220 R/W GPIO PA.8 Bit Output/Input Control GPIOA9_DOUT GP_BA+0x224 R/W GPIO PA.9 Bit Output/Input Control GPIOA10_DOUT GP_BA+0x228 R/W GPIO PA.10 Bit Output/Input Control GPIOA11_DOUT GP_BA+0x22C R/W GPIO PA.11 Bit Output/Input ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register Offset R/W Description GPIOC5_DOUT GP_BA+0x294 R/W GPIO PC.5 Bit Output/Input Control GPIOC6_DOUT GP_BA+0x298 R/W GPIO PC.6 Bit Output/Input Control GPIOC7_DOUT GP_BA+0x29C R/W GPIO PC.7 Bit Output/Input Control GPIOC8_DOUT GP_BA+0x2A0 R/W GPIO PC.8 Bit Output/Input ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Register Offset R/W Description GPIOE2_DOUT GP_BA+0x308 R/W GPIO PE.2 Bit Output/Input Control GPIOE3_DOUT GP_BA+0x30C R/W GPIO PE.3 Bit Output/Input Control GPIOE4_DOUT GP_BA+0x310 R/W GPIO PE.4 Bit Output/Input Control GPIOE5_DOUT GP_BA+0x314 R/W GPIO PE.5 Bit Output/Input ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.5.5 Register Description GPIO Port [A/B/C/D/E] I/O Mode Control (GPIOx_PMD) Register Offset R/W GP_BA+0x000 R/W GPIOA_PMD GP_BA+0x040 R/W GPIOB_PMD GP_BA+0x080 R/W GPIOC_PMD GP_BA+0x0C0 R/W GPIOD_PMD GP_BA+0x100 R/W GPIOE_PMD PMD15 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Pin OFF Digital Resistor Enable (GPIOx_OFFD) Register Offset R/W Description GP_BA+0x004 R/W GPIO Port A Pin OFF Digital Enable GPIOA_OFFD GP_BA+0x044 R/W GPIO Port B Pin OFF Digital Enable GPIOB_OFFD GP_BA+0x084 R/W ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Data Output Value (GPIOx_DOUT) Register Offset R/W Description GP_BA+0x008 R/W GPIO Port A Data Output Value GPIOA_DOUT GP_BA+0x048 R/W GPIO Port B Data Output Value GPIOB_DOUT GP_BA+0x088 R/W GPIO Port C Data ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Data Output Write Mask (GPIOx _DMASK) Register Offset R/W Description GPIOA_DMASK GP_BA+0x00C R/W GPIO Port A Data Output Write Mask GPIOB_DMASK GP_BA+0x04C R/W GPIO Port B Data Output Write Mask GPIOC_DMASK GP_BA+0x08C ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Pin Value (GPIOx _PIN) Register Offset R/W Description GP_BA+0x010 R GPIO Port A Pin Value GPIOA_PIN GP_BA+0x050 R GPIO Port B Pin Value GPIOB_PIN GP_BA+0x090 R GPIO Port C Pin Value GPIOC_PIN ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] De-bounce Enable (GPIOx _DBEN) Register Offset R/W Description GP_BA+0x014 R/W GPIO Port A De-bounce Enable GPIOA_DBEN GP_BA+0x054 R/W GPIO Port B De-bounce Enable GPIOB_DBEN GP_BA+0x094 R/W GPIO Port C De-bounce Enable GPIOC_DBEN ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Interrupt Mode Control (GPIOx _IMD) Register Offset R/W Description GP_BA+0x018 R/W GPIO Port A Interrupt Mode Control GPIOA_IMD GP_BA+0x058 R/W GPIO Port B Interrupt Mode Control GPIOB_IMD GP_BA+0x098 R/W GPIO Port C ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D] Interrupt Enable Control (GPIOx _IEN) Register Offset R/W Description GP_BA+0x01C R/W GPIO Port A Interrupt Enable GPIOA_IEN GP_BA+0x05C R/W GPIO Port B Interrupt Enable GPIOB_IEN GP_BA+0x09C R/W GPIO Port C Interrupt Enable ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] Interrupt Trigger Source (GPIOx _ISRC) Register Offset R/W Description GP_BA+0x020 R/W GPIO Port A Interrupt Trigger Source Indicator GPIOA_ISRC GP_BA+0x060 R/W GPIO Port B Interrupt Trigger Source Indicator GPIOB_ISRC GP_BA+0x0A0 R/W GPIO ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual Interrupt De-bounce Cycle Control (DBNCECON) Register Offset R/W Description GP_BA+0x180 R/W External Interrupt De-bounce Control DBNCECON Reserved ICLK_ON Bits Descriptions Interrupt clock On ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 193 - Sample interrupt input once per 8*256 clocks Sample interrupt input once per 16*256 clocks Sample interrupt input once per 32*256 clocks Sample interrupt input once per 64*256 ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual GPIO Port [A/B/C/D/E] I/O Bit Output/Input Control (GPIOxx_DOUT) Register Offset R/W Description GP_BA+0x200 - R/W GPIO Port A Pin I/O Bit Output/Input Control GPIOAx_DOUT GP_BA+0x23C GP_BA+0x240 - R/W GPIO Port B Pin I/O Bit Output/Input ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 2 5 Serial Interface Controller (Master/Slave) (I 5.6.1 Overview two-wire, bi-directional serial bus that provides a simple and efficient method of data 2 exchange between devices. The I detection ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.6.2 Features The bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus. The main features of the bus are: Master/Slave mode Bidirectional data transfer between ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.6.3 Function Description 2 5.6.3 Protocol Normally, a standard communication consists of four parts: 1) START or Repeated START signal generation 2) Slave address and R/W bit transfer 3) Data transfer 4) STOP ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.6.3.3 START or Repeated START signal When the bus is free/idle, meaning no master device is engaging the bus (both SCL and SDA lines are high), a master can initiate a transfer by sending a ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual SCL SDA Data line stable; data valid Figure 5-23 Bit Transfer on the I SCL 1 from master data output by transmitter data output by receiver S START condition Figure 5-24 Acknowledge on the I ...
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NuMicro™ NUC130/NUC140 Technical Reference Manual 5.6.4 Protocol Registers The CPU interfaces to the port through the following thirteen special function registers: I2CON (control register), I2CSTATUS (status register), I2CDAT (data register), I2CADDRn (address registers, n=0~3), I2CADMn (address mask ...