B300D44A102XXG ON Semiconductor, B300D44A102XXG Datasheet - Page 19

• Manufacturer Part Number: B300D44A102XXG
• Description: IC PROCESSOR AUDIO 24BIT 44DFN
• Manufacturer: ON Semiconductor
• Series: BelaSigna® 300r
• Type: Audio Processorr

Specifications of B300D44A102XXG

• Applications: Portable Equipment
• Mounting Type: Surface Mount
• Package / Case: 44-VFDFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: B300D44A102XXG; B300D44A102XXGOSTR

Other Digital Blocks and Functions
General−Purpose Timer
timers. These can be used for scheduling tasks that are not
part of the sample−based signal−processing scheme, such as
checking the battery voltage, and periodically asserting the
available analog and digital inputs for purposes such as
reading the value of a volume control potentiometer or
detecting input from a push button.
Watchdog Timer
that operates from the system clock and is used to ensure
system sanity. It is always active and must be periodically
acknowledged as a check that an application is still running.
Once the watchdog times out, it generates an interrupt. If left
to time out a second consecutive time without
acknowledgement, a system reset will occur.
Algorithm and Data Security
permanent retention is stored off the BelaSigna 300 chip in
separate non−volatile memory. To support this, the
BelaSigna 300 chip can gluelessly interface to an external
SPI EEPROM.
intellectual property (IP) stored in the EEPROM, a
comprehensive system is in place to protect manufacturer’s
application code and data. When locked the system
implements an access restriction layer that prevents access
to both volatile and non−volatile system memory. When
unlocked, both memory and EEPROM are accessible.
The CFX DSP system contains two general−purpose
The watchdog timer is a programmable hardware timer
Algorithm software code and user data that requires
To prevent unauthorized access to the sensitive
CFX Interrupt
Controller
CFX
Figure 7. Interrupt Flow
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Interrupts
generated by the CFX DSP core and the HEAR accelerator.
The CFX interrupt controller receives interrupts from the
various blocks within the system. The FIFO controller can
send interrupts to the CFX. The HEAR can generate events
which are interrupts in the CFX.
Hear Function Chain Controller
commands from the CFX, and events from the FIFO
controller. It must be configured by the CFX to enable the
triggering of particular function chains within a microcode
configuration. This is accomplished through the appropriate
setting of control registers as described in the Hardware
Reference Manual for BelaSigna 300.
HEAR function chain controller and the rest of the system
are shown in Figure 7.
supports decoding algorithm and data sections belonging to
an application that have been encrypted using the advanced
encryption standard (AES) and stored in non−volatile
memory. While system access restrictions are in place, the
keys used in the decryption of these sections will be secured
from external access by the regular access restrictions.
When the system is externally “unlocked” these keys will be
cleared, preventing their use in decoding an application by
non−authorized parties. After un−restricting access in this
way the system may then be restored by re−programming
the decryption keys.
The interrupt flow of the system handles interrupts
The HEAR function chain controller responds to
The interaction between the interrupt controller, the
To protect the IP in the non−volatile memory the system
FIFO Controller
Chain Controller
HEAR Function
HEAR