LX16EVK01/NOPB National Semiconductor, LX16EVK01/NOPB Datasheet - Page 19
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LX16EVK01/NOPB
Manufacturer Part Number
LX16EVK01/NOPB
Description
KIT EVAL FOR DS92LX1621/22
Manufacturer
National Semiconductor
Datasheet
1.DS92LX1621SQENOPB.pdf
(42 pages)
Specifications of LX16EVK01/NOPB
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
(Hex)
Addr
TABLE 1. DS92LX1621 Control Registers
0
1
2
3
4
VDDIO Control
I
Transmission
Transmission
VDDIO Mode
PCLK_AUTO
Transmission
2
C Device ID
CRC Fault
CRC Fault
Reserved
I
Reserved
Tolerant
Tolerant
2
Through
C Pass-
Name
Reset
TRFB
CRC
Bits
7:1
7:3
7:0
7:6
4:0
0
2
1
0
7
6
5
4
3
2
1
0
5
Field
DEVICE ID
SER ID
RESERVED
STANDBY
DIGITAL
RESET0
DIGITAL RESET1
RESERVED
RX CRC
CHECKER
ENABLE
TX CRC GEN
ENABLE
VDDIO CONTOL
VDDIO MODE
I
THROUGH
RESERVED
PCLK_AUTO
TRFB
RESERVED
CRC RESET
RESERVED
2
C PASS-
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
19
self clear
self clear
Default
0x20'h
0x58
0
0
0
0
0
1
1
1
1
1
0
1
1
0
0
Description
7-bit address of Serializer; 0x58h
(1011_000X) default
0: Device ID is from CAD
1: Register I
Reserved
Standby mode control. Retains control register data.
Supported only when M/S = 0
0: Enabled. Low-current Standby mode with wake-up
capability. Suspends all clocks and functions.
1: Disabled. Standby and wake-up disabled
1: Resets the device to default register values. Does not
affect device I
1: Digital Reset, retains all register values
Reserved
Back Channel CRC Enable
0: Disable
1: Enable
For propper CRC operation, control register 0x03h b[6]
of the Deserializer must be enabled.
Forward Channel CRC Enable
0: Disable
1: Enable
For propper CRC operation, control register 0x03h b[7]
of the Deserializer must be enabled.
Auto V
0: Disable
1: Enable (auto detect mode)
VDDIO voltage set
Only used when VDDIOCONTROL = 0
0: 1.8V
1: 3.3V
I
0: Disabled
1: Enabled
Reserved
Switch over to internal 25 MHz oscillator clock in the
absence of PCLK
0: Disable
1: Enable
Pixel Clock Edge Select:
0: Parallel Interface Data is strobed on the Falling Clock
Edge.
1: Parallel Interface Data is strobed on the Rising Clock
Edge.
Reserved
1: CRC Reset.
Clears CRC Error counter.
Reserved
2
C Pass-Through Mode
DDIO
detect
2
C Device ID overrides CAD
2
C Bus or Device ID
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