SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 83
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SI5040-D-GM
Manufacturer Part Number
SI5040-D-GM
Description
IC TXRX XFP 10GBPS 32LGA
Manufacturer
Silicon Laboratories Inc
Specifications of SI5040-D-GM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5040-D-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI5040-D-GMR
Manufacturer:
RENESAS
Quantity:
1 459
Register 156. TxdPathConfig
Reset settings = 0000 0010
Bit
7
6
5
4
3
2
1
0
Name
Type
Bit
SquelchOnTxLOS Data Squelch on Transmit Loss of Signal.
SquelchOnTxLOL Data Squelch on Transmit Loss of Lock.
FIFOAutoReset
FIFOReset
clkOnLOS
Reserved
Squelch
dinvert
Name
D7
R
dinvert
R/W
D6
Read returns zero.
Data Invert.
0 = Normal operation.
1 = TXDOUT+ and TXDOUT– outputs (pins 30, 29) are inverted.
Clock Output on Transmitter Loss of Signal.
0 = Normal operation.
1 = 622 MHz clock output on TXDOUT+ and TXDOUT– on transmitter LOS condition.
0 = Normal operation.
1 = squelch TXDOUT output (pins 30, 29) on transmitter Loss of Lock condition.
0 = Normal operation.
1 = squelch TXDOUT output (pins 30, 29) on transmitter Loss of Signal condition.
Data Squelch.
0 = Normal operation.
1 = squelch TXDOUT output (pins 30, 29).
FIFO Auto Reset.
0 = No reset of transmit FIFO on FIFO error.
1 = automatically reset transmit FIFO on FIFO underflow or overflow. FIFO pointer is
reset to center value and FIFO is cleared.
FIFO Reset.
0 = Normal operation.
1 = reset transmit FIFO. FIFO pointer is reset to center value and FIFO is cleared.
clkOnLOS
R/W
D5
SquelchOnTxLOL SquelchOnTxLOS Squelch
R/W
D4
Rev. 0.86
R/W
Function
D3
R/W
D2
FIFOAutoReset FIFOReset
R/W
D1
Si5040
R/W
D0
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