CPC5710NTR Clare, CPC5710NTR Datasheet - Page 5

• Manufacturer Part Number: CPC5710NTR
• Description: IC PHONE LINE MONITOR 8-SOIC
• Manufacturer: Clare
• Series: LITELINK®r

Specifications of CPC5710NTR

• Function: Phone Line Monitor (PLM)
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 10mA
• Power (watts): 300mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Includes: Full-Wave Ring Detector
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -
• Other names: CLA301TR; CPC5710NTR

2. Using CPC5710N
2.1 LIN/CMP Input
The LIN/CMP input selects the active output, either
the detector output CMPOUT or the linear outputs,
LINOUT- and LINOUT+. Set LIN/CMP low for linear
output and high for comparator output. Note that both
outputs cannot be used at once.
With LIN/CMP at logic low (LIN/CMP = 0), the
amplifier outputs are biased at a nominal 1V
CMPOUT is held high. With LIN/CMP at logic high
(LIN/CMP = 1), LINOUT+ is 0V and LINOUT- is 2V.
Figure 2. LIN/CMP Timing for Caller-ID Signal
2.2 Amplifier Design
Amplifier inputs are biased at a nominal 1.25V
internal voltage reference. The internal common-mode
circuitry maintains the average of the inputs at
1.25V
common-mode circuit drives the other input to 1.2V.
2.2.1 Linear Amplifier Gain
Display feature information (caller ID) and voice
signals are coupled through the linear amplifier. In
North America, CID data signals are typically sent
between the first and second ringing signal burst.
Referring to
LINOUT+ and LINOUT- is determined by:
R02
LIN/CMP
Signal levels not to scale
Considerations
DC
. For example, if one input reaches 1.3V, the
Reception
2s
Figure
500 ms
6., signal gain from tip and ring to
Caller ID data
3s
475 ms
DC
2s
DC
and
, the
www.clare.com
where
Clare Application Note AN-117
and Ringing Detect Voltage Threshold
trying different component values in this type of circuit.
2.3 Detector Considerations
2.3.1 Ringing Signal Detection
The CPC5710N detector is a full-wave configuration.
Ringing signals will assert the output on both positive
and negative parts of the ringing waveform. Hysteresis
is employed by the internal comparator circuit to
provide noise immunity. The set-up of the detector
causes CMPOUT output pulses to remain low for most
of the ringing signal positive and negative half-cycles.
CMPOUT returns high when the ringing signal is near
the zero-voltage crossing.
Figure 3. CMPOUT Relative to Input
2.3.2 Setting Ringing Detection Threshold
The ringing detection threshold depends on the
component values of the input network. The values for
these components shown in the application circuit are
recommended for typical operation. Referring to
Figure
changed according to the following formula:
GAIN
V
RINGPK
CID
ƒ
6., the ringing detection threshold can be
(
is the frequency of the signal.
=
dB


)
-------------------
R
750mV
RSNPD
=
Ringing Signal
CMPOUT
20
log


---------------------------------------------------------------------------------------- -
(
4R
(
4R
SNP
SNP
+
Customize Caller ID Gain
R
+
SNPD
R
6R
is a spreadsheet for
SNPD
SNPD
)
2
)
+
2
CPC5710N
+
------------------------------------- -
(
πf
------------------------- -
(
πfC
RING
1
SNP
1
C
SNP
)
2
)
5
2