DS21352LB+ Maxim Integrated Products, DS21352LB+ Datasheet - Page 13
DS21352LB+
Manufacturer Part Number
DS21352LB+
Description
IC TXRX T1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21352L.pdf
(137 pages)
Specifications of DS21352LB+
Function
Single-Chip Transceiver
Interface
HDLC, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
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Table 4-1 PIN DESCRIPTION SORTED BY PIN SYMBOL
Table 4-1 PIN DESCRIPTION SORTED BY PIN SYMBOL (cont.)
PIN
PIN
13
66
67
68
69
70
71
72
73
11
36
54
75
56
57
58
59
62
63
64
65
44
81
45
60
80
84
76
61
83
25
10
12
21
55
15
23
26
27
28
92
82
3
4
7
2
5
8
9
1
6
ALE (AS)/A7
SYMBOL
SYMBOL
RCHBLK
RCHCLK
8MCLK
D0/AD0
D1/AD1
D2/AD2
D3/AD3
D4/AD4
D5/AD5
D6/AD6
D7/AD7
8XCLK
JTCLK
DVDD
DVDD
DVDD
DVDD
JTRST
MCLK
RCLK
DVSS
DVSS
DVSS
DVSS
JTDO
JTMS
LIUC
MUX
INT*
JTDI
FMS
RCL
BTS
CS*
CO
NC
NC
NC
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
A6
CI
TYPE
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
–
–
–
–
–
–
–
–
–
–
–
–
–
–
I
I
I
I
I
I
I
I
I
I
I
I
-
I
I
I
I
I
I
I
DESCRIPTION
8.192 MHz Clock
Eight Times Clock
Address Bus Bit 0
Address Bus Bit 1
Address Bus Bit 2
Address Bus Bit 3
Address Bus Bit 4
Address Bus Bit 5
Address Bus Bit 6
Address Latch Enable/Address Bus Bit 7
Bus Type Select
Carry In
Carry Out
Chip Select
Data Bus Bit0/ Address/Data Bus Bit 0
Data Bus Bit1/ Address/Data Bus Bit 1
Data Bus Bit 2/Address/Data Bus 2
Data Bus Bit 3/Address/Data Bus Bit 3
Data Bus Bit4/Address/Data Bus Bit 4
Data Bus Bit 5/Address/Data Bus Bit 5
Data Bus Bit 6/Address/Data Bus Bit 6
Data Bus Bit 7/Address/Data Bus Bit 7
Digital Positive Supply
Digital Positive Supply
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Digital Signal Ground
Framer Mode Select
Digital Positive Supply
Digital Positive Supply
Interrupt
IEEE 1149.1 Test Clock Signal
IEEE 1149.1 Test Data Input
IEEE 1149.1 Test Data Output
IEEE 1149.1 Test Mode Select
IEEE 1149.1 Test Reset
Line Interface Connect
Master Clock Input
Bus Operation
No Connect
No Connect
No Connect
No Connect
No Connect
DESCRIPTION
No Connect
No Connect
Receive Channel Block
Receive Channel Clock
Receive Carrier Loss
Receive Clock
13 of 137
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