SI3019-F-GSR Silicon Laboratories Inc, SI3019-F-GSR Datasheet - Page 10
![IC VOICE DAA GCI/PCM/SPI 16SOIC](/photos/6/80/68073/16-soic__3_9mmwidth__sml.jpg)
SI3019-F-GSR
Manufacturer Part Number
SI3019-F-GSR
Description
IC VOICE DAA GCI/PCM/SPI 16SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3019-F-GSR.pdf
(112 pages)
Specifications of SI3019-F-GSR
Function
Data Access Arrangement (DAA)
Interface
GCI, PCM, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
8.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Includes
Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant
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Table 6. Switching Characteristics—General Inputs
(V
Parameter
Cycle Time, PCLK
PCLK Duty Cycle
PCLK Jitter Tolerance
Rise Time, PCLK
Fall Time, PCLK
PCLK Before RESET
RESET Pulse Width
CS, SCLK Before RESET
Rise Time, Reset
Notes:
D
=
1. All timing (except Rise and Fall time) is referenced to the 50% level of the waveform. Input test levels are
2. FSYNC/PCLK relationship must be fixed after RESET
3. The minimum RESET pulse width is the greater of 250 ns or 10 PCLK cycle times.
C S, SC LK
3.0 to 3.6 V, T
V
RESET
IH
PC LK
=
1
V
D
– 0.4 V, V
A
=
3
0 to 70 °C for K-Grade, C
2
IL
=
0.4 V. Rise and Fall times are referenced to the 20% and 80% levels of the waveform.
Figure 2. General Inputs Timing Diagram
L
=
20 pF)
Rev. 1.31
Symbol
t
t
t
jitter
t
mxr
t
dty
t
mr
t
t
t
p
rl
r
f
r
t
t
t
r
m x r
r l
0.12207
Min
250
40
10
20
—
—
—
—
t
m r
t
p
Typ
50
—
—
—
—
—
—
—
—
3.90625
Max
60
25
25
25
—
—
—
2
t
f
cycles
Unit
s
ns
ns
ns
ns
ns
ns
%
V
V
IH
IL
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