FT2232HQ - REEL FTDI, Future Technology Devices International Ltd, FT2232HQ - REEL Datasheet - Page 44

IC USB UART/FIFO DUAL HS 64-QFN

FT2232HQ - REEL

Manufacturer Part Number
FT2232HQ - REEL
Description
IC USB UART/FIFO DUAL HS 64-QFN
Manufacturer
FTDI, Future Technology Devices International Ltd
Series
USBmadeEZ-FIFOr
Datasheet

Specifications of FT2232HQ - REEL

Features
USB to UART and/or FIFO, SPI, I2C, JTAG
Number Of Channels
2, DUART
Fifo's
4096 Byte
Protocol
RS-232, RS-422, RS-485
Voltage - Supply
3 V ~ 3.6 V
With Parallel Port
Yes
With Auto Flow Control
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
768-1025-2
FT2232HQ - REEL
Application
configured
configured
Software
EEPROM
FT2232H Mode Selection
The 2 channels of the FT2232H reset to 2 asynchronous serial interfaces.
Following a reset the required mode of each channel is determined by the contents of the EEPROM
(programmed using MPROG V3.4a or later).
The EEPROM contents determine if the 2 channels have been configured as FT232 asynchronous serial
interface, FT245 FIFO interface, CPU-style FIFO interface or Fast Serial Interface.
Following a reset, the EEPROM is read to determine which mode is configured. After device enumeration,
an FT_SetBitMode command (refer to D2XX_Programmers_Guide) can be sent to the USB driver to
switch the selected interface into the required mode – asynchronous bit-bang, synchronous bit-bang or
MPSSE.
When in FT245 FIFO mode, the FT_SetBitMode command can be used to select either Synchronous
FIFO (FT_SetBitMode = 0x40) or Asynchronous FIFO mode. (Note that Asynchronous FIFO mode must
be selected on both channels before selecting the Synchronous FIFO mode. This means that an EEPROM
is needed to initially configure Asynchronous FIFO mode before software configures the Synchronous
FIFO mode).
When Synchronous FIFO mode selected, channel A uses all the memory resources of channel B. As such
channel B is then not available. In this case the state of the channel B pins is determined when the
configuration is switched to Asynchronous FIFO mode. If channel B had not been used for any data
transfer before configuration of Asynchronous FIFO mode, then the channel B pins will remain in their
default mode (D7:0=tri-stated but pulled high trough 75K resistor, TXE# =low, RXF# =high. RD# and
WR# are inputs and should be pulled high). An MPSSE command, set_data_bits can be used to
configure the channel B pins as inputs before configuring channel A as Synchronous FIFO. This avoids the
channel B pins driving against any interfaces (such as SPI) which may have been configured previous to
any switching of channel A to Synchronous FIFO mode. Refer to
http://www.ftdichip.com/Documents/AppNotes/AN2232C-01_MPSSE_Cmnd.pdf
command and further information on the MPSSE used in MCU Host BUS Emulation mode.
The MPSSE can be configured directly using the D2XX commands. The D2XX_Programmers_Guide is
available from the FTDI website at
http://www.ftdichip.com/Documents/ProgramGuides/D2XX_Programmer‟s_Guide(FT_000071).pdf
The application note AN_108 – “Command Processor For MPSSE and MCU Host Bus Emulation
Modes” gives further explanation
4.12.1
The following table Table 4.11summarises what modes are configurable using the EEPROM or the
application software.
Table 4.11 Configuration Using EEPROM and Application Software
ASYNC
Serial
UART
YES
Do I need an EEPROM?
Copyright © 2010 Future Technology Devices International Limited
ASYNC
FIFO
245
YES
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
and examples for the MPSSE.
SYNC
FIFO
245
YES
YES
ASYN
C Bit-
bang
YES
SYNC
bang
Bit-
YES
MPSSE
YES
Document No.: FT_000061
interface
Serial
Fast
Clearance No.: FTDI#77
YES
Datasheet Version 2.10
for the set_data_bits
Style
CPU-
FIFO
YES
Emulation
Host Bus
YES
44

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