LTC6360CDD#PBF Linear Technology, LTC6360CDD#PBF Datasheet - Page 15

• Manufacturer Part Number: LTC6360CDD#PBF
• Manufacturer: Linear Technology

Specifications of LTC6360CDD#PBF

• Lead Free Status / Rohs Status: Supplier Unconfirmed

applicaTions inForMaTion
The amount that the loop gain and subsequent bandwidth
will be reduced is equal to this zero-pole ratio. For example,
for 20dB of loop gain reduction (one decade bandwidth
reduction), R
Figure 8 shows the open loop gain without compensation
and with a 10Ω/330pF RC compensation network. The
pole-zero can be seen to reduce the open loop gain above
10MHz, stabilizing the amplifier for unity gain applications.
The following is a guideline for designing the RC filter to
ensure stability with a circuit gain less than five:
1. In order to sufficiently reduce the gain prior to the
2. The zero should be located below to the unity gain
unity loop gain crossover point, f
should be greater than 5/NG, where NG is the circuit
noise gain. For example, based on Equation 5, a unity
gain configuration allows a maximum R
11.25Ω.
crossover frequency, f
troduced, f
where f
without the RC network. Thus, the following condition
should be met:
where f
Figure 8. Open Loop Gain and Phase with and without
Output Compensation
f
f
C
Z
< f
= f
C(AMP)
C(AMP)
C(AMP)
C(AMP)
140
100
–20
80
60
40
20
0
FILT
10
C
will occur at a lower frequency given by:
GAIN
is the unity gain-bandwidth of the amplifier
100
/(f
/(f
should be made equal to 5Ω.
is approximately 1GHz.
Z
Z
/ f
1k
/ f
PHASE
UNCOMPENSATED
P
P
FREQUENCY (Hz)
10k 100k 1M 10M 100M
• NG)
• NG)
C
. Once the RC network is in-
10 /330pF
COMPENSATED
UNCOMPENSATED
10 /330pF
COMPENSATED
C
, the zero-pole ratio
6360 F08
1G
FILT
180
90
45
0
–45
–90
–135
–180
value of
(7)
(6)
3. Select R
The layout of the filter RC network is critical to the stability
of the part and care should be taken to minimize parasitic
inductance in this path.
Table 1 lists suggested RC filter values for some common
circuit gains. Note that longer filter time constants can be
implemented by increasing the C
shown in Table 1 without degrading stability. For large C
values, it may be necessary to use multiple high quality
surface mount capacitors to reduce ESR and maintain a
high self resonant frequency.
Table 1. Component Values for Various Circuit Gains
DNI – Do Not Install
Interfacing the LTC6360 to A/D Converters
When driving an ADC, a single-pole RC filter between
the output of the LTC6360 and the input of the ADC can
improve system performance. The sampling process
of ADCs creates a charge transient at the ADC input
This sets a lower limit on CL of:
Note that for large zero-pole ratios, additional margin
may be needed. In this case, setting f
a phase margin of at best 45°. In practice, the ampli-
fier’s higher order poles will further reduce the phase
margin below 45°. Therefore, f
than f
margin in the case of large pole-zero ratios case can
be estimated as tan
Likewise for small zero-pole ratios, the pole will not
have contributed a full 90° of lagging phase prior to the
zero contributing leading phase. The requirement for
f
while meeting the two constraints listed above.
Noise Gain (NG)
Z
being lower than f
C
FILT
C
20
10
1
2
5
in order to ensure adequate phase margin. Phase
FILT
> (f
Z
and C
/ f
P
FILT
• NG)/(2πR
R
2k
2k
2k
2k
–1
0
F
C
to yield the desired filter bandwidth
(f
can be relaxed in these cases.
C
/f
0.2pF
Z
DNI
2pF
DNI
DNI
C
).
FILT
F
FILT
Z
f
should be made lower
C(AMP)
value beyond what is
500
222
DNI
181
R
2k
G
Z
LTC6360
equal to f
)
R
DNI
DNI
DNI
25
10
FILT
15
C
330pF
150pF
C
yields
DNI
DNI
DNI
FILT
FILT
6360f
(8)