CY8C5247LTI-089 Cypress Semiconductor Corp, CY8C5247LTI-089 Datasheet - Page 18

• Manufacturer Part Number: CY8C5247LTI-089
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5247LTI-089

• Lead Free Status / Rohs Status: Compliant

6. System Integration
6.1 Clocking System
The clocking system generates, divides, and distributes clocks
throughout the PSoC system. For the majority of systems, no
external crystal is required. The IMO and PLL together can
generate up to a 40 MHz clock, accurate to ±4% over voltage and
temperature. Additional internal and external clock sources allow
each design to optimize accuracy, power, and cost. All of the
system clock sources can be used to generate other clock
frequencies in the 16-bit clock dividers and UDBs for anything
you want, for example a UART baud rate generator.
Clock generation and distribution is automatically configured
through the PSoC Creator IDE graphical interface. This is based
on the complete system’s requirements. It greatly speeds the
design process. PSoC Creator allows designers to build clocking
systems with minimal input. The designer can specify desired
clock frequencies and accuracies, and the software locates or
builds a clock that meets the required specifications. This is
possible because of the programmability inherent PSoC.
Table 6-1. Oscillator Summary
Document Number: 001-66236 Rev. *A
MHzECO
kHzECO
Doubler
Source
IMO
DSI
PLL
ILO
24 MHz
48 MHz
32 kHz
3 MHz
4 MHz
0 MHz
1 kHz
Fmin
±4% over voltage and temperature
Crystal dependent
Input dependent
Input dependent
Input dependent
–50%, +100%
Crystal dependent
Tolerance at Fmin
PRELIMINARY
Key features of the clocking system include:
Seven general purpose clock sources
Independently sourced clock dividers in all clocks
Eight 16-bit clock dividers for the digital system
Four 16-bit clock dividers for the analog system
Dedicated 16-bit divider for the CPU bus and CPU clock
Automatic clock configuration in PSoC Creator
PSoC
100 kHz
24 MHz
25 MHz
40 MHz
40 MHz
48 MHz
3 to 24 MHz IMO, ±4% at 3 MHz
4 to 25 MHz external crystal oscillator (MHzECO)
Clock doubler provides a doubled clock frequency output for
the USB block, see
DSI signal from an external I/O pin or other logic
24 to 40 MHz fractional phase-locked loop (PLL) sourced
from IMO, MHzECO, or DSI
1 kHz, 33 KHz, 100 KHz ILO for watchdog timer (WDT) and
Sleep Timer
32.768 KHz external crystal oscillator (ECO) for RTC
32 kHz
Fmax
®
±10%
Crystal dependent
Input dependent
Input dependent
Input dependent
–55%, +100%
Crystal dependent
5: CY8C52 Family Datasheet
Tolerance at Fmax
USB Clock Domain
10 µs max
5 ms typ, max is
crystal dependent
Input dependent
250 µs max
1 µs max
15 ms max in lowest
power mode
500 ms typ, max is
crystal dependent
on page 21.
Startup Time
Page 18 of 95