AD9501JN Analog Devices, AD9501JN Datasheet

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AD9501JN

Manufacturer Part Number
AD9501JN
Description
7V; 10mA; digitaly programmable delay generator. For disk drive deskewing, data communication
Manufacturer
Analog Devices
Datasheet

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a
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD9501 is a digitally programmable delay generator which
provides programmed time delays of an input pulse. Operating
from a single +5 V supply, the AD9501 is TTL- or CMOS-
compatible, and is capable of providing accurate timing adjust-
ments with resolutions as low as 10 ps. Its accuracy and
programmability make it ideal for use in data deskewing and
pulse delay applications, as well as clock timing adjustments.
Full-scale delay range is set by the combination of an external
resistor and capacitor, and can range from 2.5 ns to 10 s for a
FEATURES
Single +5 V Supply
TTL and CMOS Compatible
10 ps Delay Resolution
2.5 ns to 10 s Full-Scale Range
Maximum Trigger Rate 50 MHz
MIL-STD-883-Compliant Versions Available
APPLICATIONS
Disk Drive Deskewing
Data Communications
Test Equipment
Radar I & Q Matching
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
single AD9501. An eight-bit digital word selects a time delay
within the full-scale range. When triggered by the rising edge of
an input pulse, the output of the AD9501 will be delayed by an
amount equal to the selected time delay (t
propagation delay (t
The AD9501 is available for a commercial temperature range of
0 C to +70 C in a 20-pin plastic DIP, 20-pin ceramic DIP, and
a 20-lead plastic leaded chip carrier (PLCC). Devices fully
compliant to MIL-STD-883 are available in ceramic DIPs.
Refer to the Analog Devices Military Products Databook or current
AD9501/883B data sheet for detailed specifications.
FUNCTIONAL BLOCK DIAGRAM
Digitally Programmable
PD
).
Delay Generator
D
) plus an inherent
AD9501
Fax: 617/326-8703

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AD9501JN Summary of contents

Page 1

... Full-scale delay range is set by the combination of an external resistor and capacitor, and can range from 2 for a REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 2

... POWER SUPPLY Positive Supply Current (+5.0 V) Power Dissipation 16 Power Supply Rejection Ratio Full-Scale Range Sensitivity Minimum Prop Delay Sensitivity Operating Temperature Range AD9501JN/JP/ +70 C AD9501SQ . . . . . . . . . . . . . . . . . . . . . . . – +125 C S Storage Temperature Range . . . . . . . . . . . . – +150 C S Junction Temperature Lead Soldering Temperature (10 sec +300 C [+ ...

Page 3

... VI – All devices are 100% production tested at +25 C. 100% production tested at temperature extremes for extended temperature devices; sample tested at temperature extremes for commercial/industrial devices. Device AD9501JN AD9501JP AD9501JQ AD9501SQ *N = Plastic DIP Plastic Leaded Chip Carrier Cerdip. DIE LAYOUT AND MECHANICAL INFORMATION REV C/W ...

Page 4

AD9501 Pin No. Name LATCH 3 TRIGGER 4 RESET 5 DAC OUTPUT 6 C EXT 7 R SET 8 OFFSET ADJUST Normally connected to GROUND. Can be used to adjust minimum propagation delay (t 9 GROUND ...

Page 5

THEORY OF OPERATION The AD9501 is a digitally programmable delay device. Its function is to provide a precise incremental delay between input and output, proportional to an 8-bit digital word applied to its delay control port. Incremental delay resolution is ...

Page 6

AD9501 Offset between the two levels is necessary for three reasons. First, offset allows the ramp to reset and settle without re- entering the voltage range of the DAC. Second, the DAC may overshoot as it switches to its most ...

Page 7

Ramp charging current and DAC full-scale current are slaved together in the AD9501 to minimize delay drift over tempera- ture. To preserve the unit’s low drift performance, both R and C should have low temperature coefficients. Resistors EXT which are ...

Page 8

AD9501 For most applications, OUTPUT can be tied to RESET. This causes the output pulse to be narrow (equal to the Reset Propagation Delay t ). Alternatively, an external pulse can be RD applied to RESET. To assure a valid ...

Page 9

This delay matching is often difficult when using high speed, high-pin-count testers because lead length and circuit impedance can change when the tester setup is changed for different types of devices. The skew which might result from these changes can ...

Page 10

AD9501 AD9501 #1 should be programmed so its delay is greater than the zero-set programmed delay of AD9501 #2. To accomplish this, continue to apply clock pulses and increment the digital data into AD9501 #1 until the output of the ...

Page 11

Analog Settling Time Measurement This circuit, shown in Figure 9, functions in a manner similar to the digital delay detector; for this application, too, the clock must be repetitive the delay detector, AD9501 #1 is used to cancel ...

Page 12

AD9501 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Suffixes JQ and SQ Suffix JN Suffix JP –12– REV. A ...

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