CXA2078Q Sony, CXA2078Q Datasheet
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CXA2078Q
Specifications of CXA2078Q
Related parts for CXA2078Q
CXA2078Q Summary of contents
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... C Bus-Compatible Audio/Video Switch with Electronic Volume 2 For the availability of this product, please contact the sales office. Description 2 The CXA2078Q programmable audio, video switch designed for set top box applications. It interfaces from digital encoder sources to TV, VCR and auxilliary scart connectors. Features • ...
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... Pin Configuration VOUT2 52 FBLK_OUT 53 VOUT1 54 V _12V 55 CC VREG_9V 56 VREG_BASE 57 VIDEO_V 58 CC RIN5 59 FBLK_IN2 60 LIN5 61 VIN1 62 RIN1 63 VIN3 – 2 – CXA2078Q 33 32 ROUT1 31 VOUT5 30 LOUT1 29 VOUT6 28 ROUT2 27 VOUT7 26 LOUT2 25 AUDIO_V CC 24 VIN12 23 BIAS_AUDIO 22 VIN8 21 LIN3 20 VIN4 ...
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... Y/C MIXER 35 TRAP VOLUME CONTROL & MUTE 2 51 RTV 8dB 1dB step step 2 49 LTV 8dB 1dB step step 34 MONO Z.C.D Logic 2 32 ROUT1 2 30 LOUT1 2 ROUT2 LOUT2 38 FNC_TVA 37 FNC_TVB 46 LOG_1 45 LOG_2 44 LOG_3 43 LOG_4 CXA2078Q TV VCR AUX RF MOD TV RF MOD VCR AUX TV ...
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... V = 12V CC 22k 51 32 20k – 4 – Description Video signal inputs. Input impedance typically 120kΩ. 60µA 4.5V Audio signal inputs. Input impedance typically 60kΩ. 7µ Video signal outputs. 280µ 33µA Audio signal outputs. 20k 33µA CXA2078Q ...
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... V = 12V V CC 40k 2. 20k – 5 – Description = 9V CC Audio mono signal output. Reference Bias for video circuit. Connected to GND with capacitor Reference Bias for audio circuit. Connected to GND with capacitor controlled output giving 0/2V. Maximum load current = 800µA CXA2078Q ...
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... CC 40µ 40k 10k V 40µ 40k 4.5k – 6 – Description Pin connected to emitter of external regulator transistor. 120µA Connection to base of external regulator transistor. 120µ Clock Input 1.5V (max 3.0V (min Data input/output 1.5V (max 3.0V (min 0.4V (max) OL CXA2078Q ...
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... Open collector logic Pins. Maximum current sink = 1mA Connection to external trap circuit. Trap components should be kept as close as possible to this pin Fast Blank output set FBLK_IN1 or FBLK_IN2. High = 5.1V Low = 1.2V Connected to external emitter follower. Maximum load current = 800µA CXA2078Q 2 C ...
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... FBLK_IN1 41 — FBLK_IN2 60 FNC_VCR 5 — FNC_AUX 7 Equivalent circuit V = 12V CC 50µA 147 41 60 90µ 80µA 50k 50k 5 7 10k 100k – 8 – Description Fast Blank inputs. Low = < 0.4V High = > 1.0, < 3.0 Function switching input (Scart pin 8). Typical levels = 0V/6V/12V CXA2078Q ...
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... Video_Vcc, Dig_Vcc, Audio_Vcc FNC_TVA (pin 38) and FNC_TVB (pin 39) are static sensitive. Precaution should be taken (note 8 in "Notes on Operation"). Operation of the CXA2078Q using a 9V supply connected directly to the V and Dig_V pins is possible but not recommended. (The unused on-chip voltage regulator is then forced to CC have pins Vreg_base and Vreg_9V floating ...
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... V (Fig.4) –3 –0.4 V2 –1 100 1.5 1 0.2 15 CXA2078Q Max. Unit 70 mA Max. Unit 4.9 V 4.2 V 4.2 V 6.5 dB 6.4 dB MHz — MHz — Vp-p — Vp-p –50 dB — dB kΩ +3 ...
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... HPF @ 20Hz, LPF @ 20kHz. (Fig 1kHz, 0.5Vrms input. Set by I (Fig. 1kHz, 0.5Vrms input. Set by I (Fig. 1kHz, 1Vrms input. (Fig.6) Offset voltage between any audio input and RTV, LTV outputs (Fig.5) – 11 – CXA2078Q Min. Typ. Max. 4.2 4.5 4.8 –0.5 0 +0.5 – ...
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... Voltage measurements carried out with a high input impedance DVM. Typically 10GΩ. +12V +12V + SCL SDA 47µF Fig. 1. Video system (d.c.test) – 12 – +12V 47µH 25pF Measurement 1k Point Trap 1k Switch SW1 BC547B BC547B BC547B 25 +9V 24 22µ CXA2078Q +12V +12V +12V ...
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... All video outputs are loaded with emitter follower during tests. 5. For Luma and Chroma input to output delay, measure signal at the I.C. pins. +12V + SCL SDA – 13 – +12V 47µH 25pF Measurement 1k Point Trap 1k Switch SW1 BC547B BC547B BC547B 25 + 2.2µ 2.2µ 2.2µF 75 CXA2078Q +12V +12V +12V 22µF ...
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... Signal applied and measured from pins 14, 16, 18, 20, 22, 24, 62, 64 Notes) 1. All +9V supplies de-coupled close to supply pins, 25, 47, 58 with 10nF ceramic capacitor. 2. Voltage measurements carried out with a high input impedance DVM. Typically 10GΩ. + SCL SDA Measurement Point Fig. 3. Video system (input impedance) – 14 – CXA2078Q + 22µ ...
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... All video outputs are loaded with emitter follower during tests. +12V +12V + SCL SDA 47µF Fig. 4. Video system (linearity, sync crush) – 15 – +12V 47µH 25pF Measurement 1k Point Trap 1k Switch SW1 BC547B BC547B BC547B 25 +9V 24 22µ CXA2078Q +12V +12V +12V ...
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... Notes) 1. All +9V supplies de-coupled close to supply pins, 25, 47, 58 with 10nF ceramic capacitor. 2. Voltage measurements carried out with a high input impedance DVM. Typically 10GΩ. +9V HW mute +9V SW1 47µF SCL SDA Fig. 5. Audio system (d.c. tests) – 16 – CXA2078Q Output Measurement Point +9V 24 22µ ...
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... When muting audio using Hardware mute, SW1 is closed. +9V HW SW1 mute + 47µF SCL SDA – 17 – Measurement 33 10µF 10k 32 31 10µF 10k 30 29 10µF 10k 28 27 10µF 10k 22µ 1µ 1µF 1µF 1µF 600 600 600 CXA2078Q Point 600 ...
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... Note) All +9V supplies de-coupled close to supply pins, 25, 47, 58 with 10nF ceramic capacitor. +9V HW SW1 mute + 47µF SCL SDA Fig. 7. Audio system (Bandwidth) – 18 – Measurement 33 10µF 10k 32 31 10µF 10k 30 29 10µF 10k 28 27 10µF 10k 22µ 1µF 20 1µF 1µF 1µF 600 600 600 CXA2078Q Point 600 ...
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... Note) All +9V supplies de-coupled close to supply pins, 25, 47, 58 with 10nF ceramic capacitor. +9V HW SW1 mute + 47µF 1µF SCL SDA 600 Fig. 8. Audio system (Ripple Rejection) – 19 – Measurement Point 33 10µF 10k 32 31 10µF 10k 30 29 10µF 10k 28 27 10µF 10k 26 25 100Hz 0.3Vp 22µ 1µ 1µF 1µF 600 600 CXA2078Q +9V 600 ...
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... CC – 20 – CXA2078Q ...
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... C data bus. The circuit is shown in Fig. 1-2 with a Video_V = 9V CC Switch AMP 120k Vbias 6dB 6dB 1k 1k 6.5k 0dB 147 6.5k 0dB Fig. 1-2. Y/C MIXER Circuit – 21 – 12V CC beta = 250 BC547B SCART_out Vout Load Vout3 Vout4 Vout8 6dB TRAP 1k 47µF 25pF CXA2078Q ...
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... C will only be implemented when a minimal (ie zero 2 C read mode (Z.C status). When this bit is high, 90µs (360µs) un-mute the output buffer. Such a period provides – 22 – CXA2078Q 2 C write mode volume change or mute ...
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... Fig. 2-4. T.V. audio section and Electronic Volume Control Audio out (external) 33k 4.5V Fig. 2-2. Audio output configuration +6dB Mute 4. Registers 0 to –56dB 0 to –7dB EVC EVF Zero to control Cross logic Detect – 23 – CXA2078Q 10µF SCART 600 Terminal 400pF 10k Audio output +6dB TV Audio Output Mute (–80dB) ...
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... When Y/C Mix = 1 converts Y/C input to CVBS for output through Vout8 LOG1-LOG4: Logic outputs (open collector high impedance current sink mode. A DATA2 A DATA3 P: Stop condition EVF Vid_Sw1 (TV) Vid_Sw2 (VCR) Vid_Sw3 (AUX LOG4 – 24 – CXA2078Q A DATA4 A DATA5 (W) 0 Z.C.D TVMute Aud_Sw1 (TV) Aud_Sw2 (VCR) Aud_Sw3 (AUX) LOG3 LOG2 LOG1 ...
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... At pin 7 AV switch monitors the voltage of pin 8 from AUX scart, and records status. ZC Status: ZC Status = 1 indicates that zero cross condition has been achieved after a volume or mute instruction issued. P.O.D.: Power On Detect. P.O. when DIG_V approximately 5V P.O.D. FUNC_AUX STATUS voltage rises above a threshold level of CC – 25 – CXA2078Q ( FUNC_VCR ...
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... Vin10 Digital encoder Vin11 VCR Vin12 Aux Vin3 Digital encoder Vbias Video Mute Vbias Video Mute Vbias Video Mute – 26 – CXA2078Q Vout4 Comment CVBS/Y Vin9 Digital encoder Vin10 Digital encoder Vin11 VCR Vin12 Aux Vin3 Digital encoder Vin10 Digital encoder ...
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... Vin9 Vbias Vin11 Vin12 Vin3 Vbias Vbias Vbias Table 3-3. showing which video input pins connect to the single AUX output pin Comment Digital encoder Video Mute VCR Aux Digital encoder Video Mute Video Mute Video Mute – 27 – CXA2078Q ...
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... I C Control In the CXA2078Q, there are two fast blanking inputs, one associated with the auxiliary RGB/CVBS inputs and another associated with Digital Encoder input. These can be selected by I inputs, the fast blank pin output can be set to a constant means of the I four possible states. These are controlled according to the following table. ...
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... TV Function switch, Interface table FNC_TVA d3_b7 d3_b6 Pin voltage Default is Internal TV ( power Z.C P.O.D. STATUS read data6 b3/b1 b2/b0 (Internal TV) 0 (16:9 External) 0 (4:3 External) 1 FNC_TVB Comment Pin voltage 2V Internal TV (default) 2V External 16:9 0V External 4:3 0V External 4:3 – 29 – FUNC_AUX FUNC_VCR CXA2078Q b0 (R) 1 ...
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... Some external circuitry is required to interface from the IC pins to the SCART pin 8. A typical interface circuit is shown in Fig. 5-2. CXA2078Q FNC_TVA (38) Circuit FNC_TVB (37) Mux d3_b6 Fig. 5-1. TV Function switch output 12V FNC_TVA 1k FNC_TVB 2.2k 2.2k Fig. 5-2. External circuit for function switch – 30 – 2V < 0.4V 2V < 0. scart pin 8 50 CXA2078Q ...
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... C bit 1 = current sink mode resulting in 0.2V saturation voltage on logic pin Vmax at logic pin = 12V Imax during current sink = 1mA d5_b3 d5_b2 d5_b1 d5_b0 10k 10k LOG_1 LOG_2 Logic Logic cct. cct. Fig. 6-1. Open collector logic outputs – 31 – External 10k 10k resistors LOG_3 LOG_4 CXA2078Q ...
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... Rin3 Rin4 Rin5 Audio mute Audio mute Audio mute Gain (dB) 0 –8 –16 –24 –32 –40 –48 –56 Gain (dB) 0 –1 –2 –3 –4 –5 –6 –7 – 32 – Lin1 Lin2 Lin3 Lin4 Lin5 Audio mute Audio mute Audio mute CXA2078Q ...
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... As shown on the application schematic, static protection for pins 38 and 37 may typically be achieved using Zener diodes. Diodes with a Zener voltage > 5V are suitable. Z.C.D RTV, LTV, MONO output DATA1 b0 0 Un-mute immediately 1 Un-mute on next zero cross 0 Mute immediately 1 Mute on the next zero cross – 33 – CXA2078Q ...
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... NOTE: Audio input 6k resistor removed for this test. Video frequency characteristics 100k Input = 1kHz, 400Hz – 80kHz BPF 3.66 Input [Vrms] Input = 0.3Vp-p 10k 100k Frequency [Hz] V 1-8 (MIX = OFF) OUT V 8 (MIX = ON) OUT Input = 0.3Vp-p 1M 10M Frequency [Hz] – 34 – CXA2078Q 1M 50M ...
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... PACKAGE STRUCTURE PACKAGE MATERIAL QFP–64P–L01 LEAD TREATMENT LEAD MATERIAL QFP064–P–1420 PACKAGE MASS – 35 – + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.05 + 0.35 M EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 1.5g CXA2078Q ...