IDT77155L155PX Integrated Device Technology, Inc., IDT77155L155PX Datasheet

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... RXPRTY Cell FIFO RDAT[7:0] RSOC RCA NICStAR is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ©1996 Integrated Device Technology, Inc. PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS • Supports PHYs for Multi-PHY connections with 2- bit address and 8-bit data using UTOPIA 2 protocol. • ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE User Network Interface specifications. The IDT77155 provides both Transmission Convergence (TC) and Physical Media Dependent (PMD) sublayer func- tions of a 155.52 Mbps/51.84 Mbps ATM PHY suitable for ATM networks. The SONET/SDH ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PACKAGE DIMENSIONS 128 1 128-Pin PQFP 5'-10" D1 6'-8" D DIMENSIONS DIMENSIONS DIMENSIONS DIMENSIONS DIMENSIONS 128-PIN PQFP DImension Tolerance Letter (mm) A Max. A1 +.10 A2 +.17 D +.25 D1 +.10 E ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PIN DESCRIPTIONS Symbol Name I/O A0-A7 Address I AGND Analog Ground G ALE Address Latch I Enable ALOS+ Analog Loss of I ALOS- Signal ATP1 Test pin I ATP2 Test pin I ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O RBYP Receive Bypass I RCA/ Receive Cell O Available RXEMPTY RCLK Receive Clock O RCP Receive Cell O Read I RD RDAT0- Receive Data O RDAT7 ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O RSOC Receive Start O of Cell Reset I RST RXADDR[0] Receive Address I RXADDR[1] RXD+ Receive I RXD- Differential Data Inputs RXDO+ Receive O RXDO- Differential ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O TFPO Transmit Framing O Position Output TGFC Transmit Generic I Flow Control TRCLK+ Transmit I TRCLK- Reference Clock TSEN Transmit Enable I TSOC Transmit Start of ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE PIN DESCRIPTIONS (CONTINUED) Symbol Name I/O TXGND Ground G Vcc Power P VCLK Vector Clock I Write I WR XOFF Transmit Off I Notes 1. All inputs operate at TTL levels except ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Digital Supply Voltage CC GND Digital Ground Voltage V PECL Input Low Voltage ILp V PECL Input High Voltage IHp V PECL Output Low Voltage OLp ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE FUNCTIONAL DESCRIPTION CLOCK RECOVERY The clock recovery Block recovers the clock from the receiving serial data stream. This block can be selected to utilize reference clocks at 6.48 MHz or 19.44 MHz. ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE of any pattern other than “111” in bits 6 byte are detected. For SDH applications, Line AIS is declared when three consecutive frames “111” pattern in bits 6 ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE verification while in SYNC state. The HEC verification state machine is shown in Figure 2. The state machine is initialized to “correction mode”. Cells with no HEC errors are passed to the ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE The outgoing path BIP-8 error detection code (B3) is calculated over all bits of Synchronous Payload Envelope (SPE) of STS-3c or STS-1 frame before scrambling by bit interleaved parity calculation using even ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TFCLK TSOC TCA X H1 TDAT[0:7] TXPRTY X Figure 3. Transmit Waveform for UTOPIA Interface RFCLK RSOC Z RCA RDAT[0:7] H1 RXPRTY Figure 2. HEC Verification State Diagram TCALEVEL0 = 1 P44 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TCLK TCP X TGFC RCLK RCP X GFC[3] RGFC GFC[3] GFC[2] GFC[1] Figure 5. Transmit GFC Serial Link Waveform GFC[2] GFC[1] GFC[0] Figure 6. Receive GFC Serial Link Waveform 8.03 ADVANCED INFORMATION ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE OPERATION MODES MULTI-PHY OPERATION Multiple IDT77155s may be connected to common bus when a Multi-PHY system architecture is needed. Both Transmit and Receive UTOPIA busses, as well as the utility bus, can ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TFCLK TXPRTY Transmit UTOPIA TDAT[7: Cell TSOC FIFO TCA TxADDR[1:0] MPHYEN RxADDR[1:0] TSEN ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE REGISTER LISTING Address Register 0X00 Master Reset & ID Register 0X01 Configuration Register 0X02 Interrupt Register 0X04 Master Clock Monitor Register 0X05 Master Control Register 0X06 Transmit Clock Synthesis Control/Status Register 0X07 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE CONFIGURATION, CONTROL AND STATUS REGISTERS MASTER RESET & ID REGISTER ADDRESS 0X00 Bit Type Symbol Bit 7 R/W mstReset Bit 6 R type[2] Bit 5 R type[1] Bit 4 R type[0] Bit ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE INTERRUPT REGISTER DEFAULT = 8’BXXXXXXXX ADDRESS 0X02 Bit Type Symbol Bit 7 R txOOLInt Bit 6 R rxLOCInt Bit 5 R rxOOLInt Bit 4 R txCDi Bit 3 R rxCDi Bit 2 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE MASTER CONTROL REGISTER ADDRESS 0X05 Bit Type Symbol Bit 7 R/W rxLOCIEn Bit 6 R LOC Bit 5 R/W txFixptr Bit 4 — Bit 3 — Bit 2 R/W txLLoop Bit 1 ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE SECTION OVERHEAD CONTROL REGISTER ADDRESS 0X10 Bit Type Symbol Bit 7 — — Bit 6 R/W scrDis Bit 5 W frcOOF Bit 4 — — Bit 3 R/W B1ErrIEn Bit 2 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE ADDRESS 0X13 Bit Type Symbol Bit 7 R B1ErrCnt[15] Bit 6 R B1ErrCnt[14] Bit 5 R B1ErrCnt[13] Bit 4 R B1ErrCnt[12] Bit 3 R B1ErrCnt[11] Bit 2 R B1ErrCnt[10] Bit 1 R ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE LINE OVERHEAD STATUS REGISTER ADDRESS 0X18 Bit Type Symbol Bit 7 R/W B2Word Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — — Bit 2 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE ADDRESS 0X1B Bit Type Symbol Bit 7 R B2ErrCnt[15] Bit 6 R B2ErrCnt[14] Bit 5 R B2ErrCnt[13] Bit 4 R B2ErrCnt[12] Bit 3 R B2ErrCnt[11] Bit 2 R B2ErrCnt[10] Bit 1 R ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT LINE OVERHEAD STATUS REGISTER DEFAULT = 8’B00000000 ADDRESS 0X20 Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE PATH OVERHEAD STATUS REGISTER ADDRESS 0X30 Bit Type Symbol Bit 7 — Bit 6 — Bit 5 R LOP Bit 4 — Bit 3 R PAIS Bit 2 R PRDI Bit ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE PATH SIGNAL LABEL BYTE REGISTER DEFAULT = 8’BXXXXXXXX ADDRESS 0X37 Bit Type Symbol Bit 7 R C2rx[7] Bit 6 R C2rx[6] Bit 5 R C2rx[5] Bit 4 R C2rx[4] Bit 3 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE PATH BIP ERROR CONTROL REGISTER ADDRESS 0X3D Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 R/W blkBIP Bit 4 — — Bit 3 — — Bit ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT POINTER CONTROL REGISTER ADDRESS 0X41 Bit Type Symbol Bit 7 — — Bit 6 R/W frcPtr Bit 5 R/W stuffCtl Bit 4 R/W Ptr Bit 3 R/W NDF Bit 2 R/W ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT POINTER MSB REGISTER ADDRESS 0X46 Bit Type Symbol Bit 7 R/W NDFVal[3] Bit 6 R/W NDFVal[2] Bit 5 R/W NDFVal[1] Bit 4 R/W NDFVal[0] Bit 3 R/W ssBit[1] Bit 2 R/W ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT PATH SIGNAL LABLE BYTE REGISTER DEFAULT = 8’B00010011 ADDRESS 0X48 Bit Type Symbol Bit 7 R/W C2tr[7] Bit 6 R/W C2tr[6] Bit 5 R/W C2tr[5] Bit 4 R/W C2tr[4] Bit 3 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE CELL CONTROL REGISTER ADDRESS 0X50 Bit Type Symbol Bit 7 R OCD Bit 6 R/W parity Bit 5 R/W pass Bit 4 R/W corDis Bit 3 R/W HECdis Bit 2 R/W ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE CELL MATCH HEADER REGISTER ADDRESS 0X52 Bit Type Symbol Bit 7 R/W GFC[3] Bit 6 R/W GFC[2] Bit 5 R/W GFC[1] Bit 4 R/W GFC[0] Bit 3 R/W PTI[2] Bit 2 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE CELL UNCORRECTABLE ERROR COUNTER ADDRESS 0X55 Bit Type Symbol Bit 7 R uncorCnt[7] Bit 6 R uncorCnt[6] Bit 5 R uncorCnt[5] Bit 4 R uncorCnt[4] Bit 3 R uncorCnt[3] Bit 2 ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE ADDRESS 0X58 Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — — Bit 2 R cellCnt[18] Bit 1 R ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE ID ADDRESS REGISTER ADDRESS 0X5A Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — — Bit 2 — ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT CELL IDLE/UNASSIGNED CELL HEADER PATTERN ADDRESS 0X61 Bit Type Symbol Bit 7 R/W GFCtx[3] Bit 6 R/W GFCtx[2] Bit 5 R/W GFCtx[1] Bit 4 R/W GFCtx[0] Bit 3 R/W PTItx[2] Bit ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT CELL CONFIGURATION REGISTER ADDRESS 0X63 Bit Type Symbol Bit 7 R/W parity Bit 6 R/W parIEn Bit 5 — — Bit 4 R/W parInt Bit 3 R/W FIFOdpth[1] Bit 2 R/W ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE ADDRESS 0X66 Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — — Bit 2 R txcellCnt[18] Bit 1 R ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TRANSMIT ID ADDRESS REGISTER DEFAULT = 8’B00000000 ADDRESS 0X68 Bit Type Symbol Bit 7 — — Bit 6 — — Bit 5 — — Bit 4 — — Bit 3 — — ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE BER FAIL WINDOW REGISTER ADDRESS 0X72 Bit Type Symbol Bit 7 R/W WinFail[7] Bit 6 R/W WinFail[6] Bit 5 R/W WinFail[5] Bit 4 R/W WinFail[4] Bit 3 R/W WinFail[3] Bit 2 ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE RECEIVE BER WARNING WINDOW REGISTER ADDRESS 0X76 Bit Type Symbol Bit 7 R/W WinWarn[7] Bit 6 R/W WinWarn[6] Bit 5 R/W WinWarn[5] Bit 4 R/W WinWarn[4] Bit 3 R/W WinWarn[3] Bit 2 ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE SYMBOL TFCLK frequency TFCLK duty cycle RFCLK frequency RFCLK duty cycle Receive line clock duty cycle Receive line clock duty cycle tRSO Receive clock RCLK to RCP/RGFC valid tALHD Address to latch ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE t t TOV TSU TFCLK TSOC TCA X H1 TDAT[0:7] X TXPRTY Figure 11. Transmit Timing for UTOPIA Interface SYMBOL TFCLK frequency TFCLK duty cycle tTHD Input hold to TFCLK applies to ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE t GSO TCLK TCP X TGFC SYMBOL tGHD TGFC hold to TCLK tGSO Transmit clock TCLK to TCP valid tGSU TGFC set up to TCLK t RSO RCLK RCP X GFC[3] RGFC ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE TXC+ TXC- TXD+ TXD- SYMBOL Receive line clock duty cycle (155.52 MHz or 51.84 MHz - RBYP high) ( 19.44 MHz or 6.48 MHz - RBYP low ) tSOV Transmit line clock ...

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IDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE t ALSU X A[7:0] ALE D[7:0] SYMBOL tALHD Address to latch enable hold time tALSU Address to latch enable setup time tARHD Address to read hold time tARSU Address ...

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IIDT77155 155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE t ALSU X A[7:0] ALE / D[7:0] SYMBOL tALHD Address to latch enable hold time tALSU Address to latch enable setup time tAWHD Address to write hold time tAWSU Address to write ...

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... Added timing diagrams and corrected signals that are active low. Integrated Device Technology, Inc. reserves the right to make changes to the specifications in this data sheet in order to improve design or performance and to supply the best possible product. Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA 95054-3090 ...