AMD-8131BLC Advanced Micro Devices, AMD-8131BLC Datasheet
AMD-8131BLC
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AMD-8131BLC Summary of contents
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PCI-X IO window = {7'h00, Dev[B,A]:30[24:16], Dev[B,A]:0x1C[15:12], 12'hFFF} >= address >= {7'h00, Dev[B,A]:30[8:0], PCI-X non-prefetchable memory window = {24'h00, DevA:0xD8[15:8], Dev[B,A]:0x20[31:20], 20'hF_FFFF} >= address >= {24'h00, DevA:0xD8[7:0], PCI-X prefetchable memory window = {24'h0, Dev[B,A]:2C[7:0], Dev[B,A]:0x24[31:20], 20'hF_FFFF} >= address >= ...
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NIOAIRQA DevA:0x40[NIOAMODE] & ~A_PIRQA# & RDRA0[IM] | DevB:0x40[NIOAMODE] & ~B_PIRQA# & RDRB0[IM] ); NIOAIRQB DevA:0x40[NIOAMODE] & ~A_PIRQB# & RDRA1[IM] | DevB:0x40[NIOAMODE] & ~B_PIRQB# & RDRB1[IM] ); 49 ...
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SHPC_WAKEUP = (SHPC[B, A]:18[IP] != 0000b) | ~SHPC[B, A]:20[CC_IM] & SHPC[B, A]:20[CC_STS]; SHPC_INTR = ~SHPC[B, A]:20[GIM] & SHPC_WAKEUP; SHPC_SERR = ~SHPC[B, A]:20[GSERRM] & ( (SHPC[B, A]:1C[SERRP] != 0000b) | ~SHPC[B, A]:20[A_SERRM] & SHPC[B, A]:20[ATOUT_STS]); 71 ...
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A LDT VSS VSS LTACA LTACA LTACA LTACA COMP1 D_P0 D_N0 D_P2 D_N2 B LDT VSS LDT VSS VSS LTACA VDD18 LTACA COMP2 COMP0 D_P1 D_P3 C VSS VSS LDT VSS ...
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