IDT71V632 Integrated Device Technology, Inc., IDT71V632 Datasheet
IDT71V632
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IDT71V632 Summary of contents
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... Power down controlled by ZZ input Operates with a single 3.3V power supply (+10/-5%) Packaged in a JEDEC Standard 100-pin rectangular plastic thin quad flatpack (TQFP). The IDT71V632 is a 3.3V high-speed SRAM organized as 64K –A Address Inputs 0 ...
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... N/A NC pins are not electrically connected to the chip. I HIGH Asynchronous sleep mode input. ZZ HIGH will gate the CLK internally and power down the IDT71V632 to its lowest power consumption level. Data retention is guaranteed in Sleep Mode. 6.42 2 Commercial and Industrial Temperature Ranges . If BWE is – ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect LBO ADV CLK ADSC ADSP A – BWE CS0 Powerdown OE 32 I/O –I Commercial and Industrial Temperature Ranges Burst CE Sequence 2 Burst Binary Logic Counter Q0 CLR Q1 2 CLK ADDRESS REGISTER ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Symbol Rating (2) Terminal Voltage with V TERM Respect to GND (3) V Terminal Voltage with TERM Respect to GND T Operating Temperature A T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation Output Current ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect 100 I I DDQ V 5 SSQ SSQ V 11 DDQ I I ( DDQ V 21 SSQ SSQ V 27 DDQ I I NOTES: 1. Pin 14 can either be directly connected ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Address Operation Used Deselected Cycle, Power Down None Deselected Cycle, Power Down None Deselected Cycle, Power Down None Deselected Cycle, Power Down None Deselected Cycle, Power Down None ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect GW Operation Read H Read H Write all Bytes L Write all Bytes H (2) Write Byte 1 H (2) Write Byte 2 H (2) Write Byte 3 H (2) Write Byte 4 H NOTES Don’t Care Multiple bytes may be selected during the same cycle. ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Symbol Parameter |I | Input Leakage Current LI ZZ and LBO Input Leakage Current |I | LZZ |I Output Leakage Current (3.3V) Output Low Voltage OL V (3.3V) Output High Voltage OH NOTE: 1. The LBO pin will be internally pulled to V ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Symbol Parameter CLOCK PARAMETERS t Clock Cycle Time CYC (1) t Clock High Pulse Width CH (1) t Clock Low Pulse Width CL OUTPUT PARAMETERS t Clock High to Valid Data CD t Clock High to Data Change ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges 6.42 10 ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges 6.42 11 ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges GW 6. ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges 6.42 13 ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges 6.42 14 ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect CLK ADSP ADSC ADDRESS Av GW, BWE, BWx CE DATA OUT NOTES input is LOW, ADV is HIGH and LBO is Don’t Care for this cycle represents the data for address A , etc. ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect CLK ADSP ADSC ADDRESS DATA IN NOTES input is LOW, ADV and OE are HIGH, and LBO is Don’t Care for this cycle represents the data for address A , etc Although only GW writes are shown, the functionality of BWE and BWx together is the same as GW. ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Commercial and Industrial Temperature Ranges 6.42 17 ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect IDT 71V632 S X Device Power Speed Type PART NUMBER SPEED IN MEGAHERTZ 71V632SA4PF 71V632S5PF 71V632S6PF 71V632S7PF X PF Process/ Package Temperature Range Blank Commercial only. t PARAMETER CD 117 MHz 4.5 ns ...
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... IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect 9/9/99 Pg Pg. 15, 16 Pg. 18 09/30/99 Pg 04/04/00 Pg. 17 08/09/00 08/17/01 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Updated to new format Revised speed offerings to 66– ...