74LVC1G66GV NXP Semiconductors, 74LVC1G66GV Datasheet

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74LVC1G66GV

Manufacturer Part Number
74LVC1G66GV
Description
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
74LVC1G66GV
Manufacturer:
NXP/恩智浦
Quantity:
20 000
1. General description
2. Features
The 74LVC1G66 is a low-power, low-voltage Si-gate CMOS device.
The 74LVC1G66 provides one single pole, single-throw analog switch function. It has two
input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW,
the analog switch is turned off.
Schmitt-trigger action at the enable input makes the circuit tolerant of slower input rise and
fall times across the entire V
74LVC1G66
Bilateral switch
Rev. 06 — 27 August 2007
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
Switch current capability of 32 mA
High noise immunity
CMOS low power consumption
TTL interface compatibility at 3.3 V
Latch-up performance meets requirements of JESD78 Class I
ESD protection:
Enable input accepts voltages up to 5.5 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
7.5
6.5
6
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
(typical) at V
(typical) at V
(typical) at V
CC
CC
CC
= 5 V
CC
= 2.7 V
= 3.3 V
range from 1.65 V to 5.5 V.
Product data sheet

Related parts for 74LVC1G66GV

74LVC1G66GV Summary of contents

Page 1

Bilateral switch Rev. 06 — 27 August 2007 1. General description The 74LVC1G66 is a low-power, low-voltage Si-gate CMOS device. The 74LVC1G66 provides one single pole, single-throw analog switch function. It has two input/output terminals (Y and Z) and ...

Page 2

... C to +125 C 74LVC1G66GV +125 C 74LVC1G66GM +125 C 74LVC1G66GF +125 C 4. Marking Table 2. Marking Type number 74LVC1G66GW 74LVC1G66GV 74LVC1G66GM 74LVC1G66GF 5. Functional diagram E Y 001aag487 Fig 1. Logic symbol Fig 3. Logic diagram 74LVC1G66_6 Product data sheet Description TSSOP5 plastic thin shrink small outline package; 5 leads; ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G66 GND 001aad654 Fig 4. Pin configuration SOT353-1 and SOT753 6.2 Pin description Table 3. Pin description Symbol Pin SOT353-1/SOT753 GND n. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level 74LVC1G66_6 Product data sheet ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I I input clamping current IK I switch clamping current SK V switch voltage SW I switch current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage pin current 5 OFF-state S(OFF leakage see ...

Page 6

... NXP Semiconductors 10.1 Test circuits GND GND and V = GND Fig 7. Test circuit for measuring OFF-state leakage current 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Symbol Parameter R ON resistance (peak) ON(peak resistance (rail) ...

Page 7

... NXP Semiconductors Table 8. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Symbol Parameter R ON resistance ON(flat) (flatness) [1] Typical values are measured at T [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V temperature ...

Page 8

... NXP Semiconductors (4) (3) (2) ( 0.4 0.8 ( 125 C. amb ( amb ( amb ( amb Fig 11. ON resistance as a function of input voltage 1 (1) 9 (2) ( 0.5 1.0 1.5 ( 125 C. amb ( amb ( amb ( amb Fig 13. ON resistance as a function of input voltage 2 74LVC1G66_6 Product data sheet 001aaa712 R 1.2 1 ...

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... NXP Semiconductors ( 125 C. amb ( amb ( amb ( amb Fig 15. ON resistance as a function of input voltage; V 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t propagation delay see enable time ...

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... NXP Semiconductors Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t disable time see dis power dissipation capacitance V = GND [1] Typical values are measured the same as t and t pd PLH PHL [3] propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specifi ...

Page 11

... NXP Semiconductors LOW-to-OFF OFF-to-LOW HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and V are typical output voltage levels that occur with the output load Fig 17. Enable and disable times Table 10. Measurement points Supply voltage Input 1. 1.95 V 0.5V 2 2.7 V 0.5V 2 ...

Page 12

... NXP Semiconductors Test data is given in Table 11. Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance External voltage for measuring switching times. EXT Fig 18. Load circuit for switching times Table 11. ...

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... NXP Semiconductors Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter frequency response ( 3dB) isolation (OFF-state) iso V crosstalk voltage ct 74LVC1G66_6 Product data sheet …continued Conditions R = 600 ; pF see Figure pF; see Figure pF; see ...

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... NXP Semiconductors Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter Q charge injection inj 11.3 Test circuits Test conditions 1. 1.4 V (p-p 2 (p-p 2.5 V (p-p 4 (p-p Fig 19. Test circuit for measuring total harmonic distortion Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 20 ...

Page 15

... NXP Semiconductors Adjust f voltage to obtain 0 dBm level at input. i Fig 21. Test circuit for measuring isolation (OFF-state) Fig 22. Test circuit for measuring crosstalk between digital input and switch inj output voltage variation generator resistance. gen V = generator voltage. gen Fig 23. Test circuit for measuring charge injection ...

Page 16

... NXP Semiconductors 12. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 24 ...

Page 17

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 25. Package outline SOT753 (SC-74A) 74LVC1G66_6 Product data sheet scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2 ...

Page 18

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 19

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 27 ...

Page 20

... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name when appropriate. • Added type number 74LVC1G66GM (XSON6/SOT886 package) • ...

Page 21

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 22

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics 10.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.3 ON resistance test circuit and graphs Dynamic characteristics ...

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