OP282 Analog Devices, OP282 Datasheet
OP282
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OP282 Summary of contents
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... V/ s with supply current under 250 A per amplifier. These unity gain stable amplifiers have a typical gain bandwidth of 4 MHz. The JFET input stage of the OP282/OP482 insures bias current is typically a few picoamps and below 500 pA over the full temperature range. Offset voltage is under 3 mV for the dual and under 4 mV for the quad ...
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... Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 1 Guaranteed by CMR test. Specifications subject to change without notice 15 +25 C unless otherwise noted Conditions OP282 OS OP282, – OP482 OS OP482, – ...
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... V Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range P, S Packages . . . . . . . . . . . . . . . . . . . . . . – +150 C Operating Temperature Range OP282A, OP482A . . . . . . . . . . . . . . . . . . – +125 C OP282G, OP482G . . . . . . . . . . . . . . . . . . . – +85 C Junction Temperature Range P, S Packages . . . . . . . . . . . . . . . . . . . . . . – +125 C Lead Temperature Range (Soldering, 60 sec +300 C 2 Package Type ...
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... This limits the amount of current through the forward- biased diode and prevents the shutting down of the output stage. For the OP282/OP482, a value of 200 k has been found to work. However, this adds a significant amount of noise. +15 V) ...
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... Note that the digital value of the DAC is in the numerator, therefore zero code is not a valid operating point 1/4 DAC8408 1/4 1/4 OP482 HIGH PASS DAC8408 1/4 1/4 OP482 OP482 Figure 3. –5– OP282/OP482 256 The gain equation is Gain R 256 5 R 256 ...
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... OP282/OP482 OP282/OP482 SPICE MACRO MODEL Figure 4 shows the OP282 SPICE macro model. The model for the OP482 is similar to that of the OP282, but there are some IN- 2 CIN IOS 1 IN R23 G15 C15 98 50 minor changes in the circuit values. Contact ADI for a copy of the latest SPICE model diskette for both listings ...
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... OP282 SPICE MACRO MODEL * Node assignments * noninverting input * inverting input * positive supply * * * .SUBCKT OP282 INPUT STAGE & POLE AT 15 MHZ * 5E11 5E11 3871 3871.3 CIN 1 2 5E- 1.37E- 0.1E-3 IOS 1 2 5E-13 EOS 7 1 POLY( 200E EREF GAIN STAGE & POLE AT 124 HZ ...
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... Figure 11. Small Signal Overshoot vs. Load Capacitance 1000 V = ±15V 100 10 1.0 0 100 125 –50 –25 TEMPERATURE – °C Figure 12. OP282 Input Bias Current vs. Temperature 1000 V = ±15V S ° + 100 10 1 0.1 –15 –10 – COMMON - MODE VOLTAGE – V Figure 13. OP282 Input Bias Current vs. Common-Mode Voltage REV. B ...
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... Figure 20. OP482 Closed-Loop Out- put Impedance vs. Frequency 100 V = ±15V 100mV + PSRR ° + – PSRR –20 100 1k 10k 100k 1M FREQUENCY – Hz Figure 21. OP282 Power Supply Rejection Ratio (PSRR) vs. Frequency 100 V = ±15V 100mV CM ° + –20 100 1k 10k 100k 1M FREQUENCY – Hz Figure 22. OP282 Common-Mode ...
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... V – µV OS Figure 29. OP482 V Distribution “Z” OS Package 320 280 240 200 160 120 TCV – µV/°C OS Figure 25. OP282 TCV ( Distribution "P" Package 320 280 240 200 160 120 TCV – µV/°C OS Figure 26. OP282 TCV ( Distribution "Z" Package ° ...
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... Narrow-Body SOIC (S Suffix) 14-Lead Narrow-Body SOIC (S Suffix) REV. B OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 20-Position Chip Carrier (RC Suffix) –11– OP282/OP482 8-Lead Epoxy DIP (P Suffix) 14-Lead Epoxy DIP (P Suffix) ...
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REV. B ...