SP5659 Zarlink Semiconductor, SP5659 Datasheet

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SP5659

Manufacturer Part Number
SP5659
Description
Manufacturer
Zarlink Semiconductor
Datasheet

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designed for tuning systems up to 2·7GHz.
which can be disabled for applications up to 2GHz, allowing
direct interfacing with the programmable divider, resulting in
a step size equal to the comparison frequency. For applications
up to 2·7GHz the divide-by two is enabled to give a step size
of twice the comparison frequency.
chip crystal controlled oscillator or from an external source.
The oscillator frequency F
F
feature is ideally suited to providing the reference frequency
for a second synthesiser such as in a double conversion
tuner (see Fig. 5).
to one of four programmable addresses which are selected
by applying a specific voltage to the Address input. This
feature enables two or more synthesisers to be used in a
system.
5-level ADC, the output of which can be read via the I
charge pump disable facility.
Features
COMP
The SP5659 is a single chip frequency synthesiser
The RF preamplifier drives a divide-by two prescaler
The comparison frequency is obtained either from an on-
The synthesiser is controlled via an I
The SP5659 contains four switching ports, P0-P3 and a
The SP5659 also contains a varactor line disable and
Complete 2·7GHz Single Chip System
Optimised for Low Phase Noise
Selectable 42 prescaler
Selectable Reference Division Ratio
Selectable Reference/Comparison Frequency Output
Selectable Charge Pump Current
Varactor Drive Amplifier Disable
5-Level ADC
may be switched to the REF/COMP output; this
REF
or the comparison frequency
2
C bus and responds
2·7GHz I
2
C bus.
2
C Bus Low Phase Noise Synthesiser
DS4296
Applications
Thermal Data
u
u
JC
JA
Variable I
ESD Protection: 4kV, Mil-Std-883C, Method 3015
Pin Compatible with SP5658
(1) Normal ESD handling precautions should be observed.
Satellite TV
High IF Cable Tuning Systems
= 111 C/W
= 41 C/W
CHARGE PUMP
Figure 1 – Pin connections – top view
REF/COMP
(16-lead miniature Plastic Package)
ADDRESS
SP5659/KG/MP1T (Tape and reel)
CRYSTAL
PORT P3
PORT P2
2
C BUS Address for Multi-tuner Applications
SP5659/KG/MP1S (Tubes)
SDA
SCL
Ordering Information
Preliminary Information
ISSUE 2.2
1
2
3
4
5
6
7
8
SP5659
16
15
14
13
12
10
11
9
DRIVE
V
RF INPUT
RF INPUT
V
ADC
PORT P0
PORT P1
EE
CC
MP16
SP5659
May 2002
(1)

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SP5659 Summary of contents

Page 1

... Address input. This feature enables two or more synthesisers to be used in a system. The SP5659 contains four switching ports, P0-P3 and a 5-level ADC, the output of which can be read via the I The SP5659 also contains a varactor line disable and charge pump disable facility ...

Page 2

... SP5659 Preliminary Information - + + > > ...

Page 3

... F PD 13-BIT PHASE COUNT COMP LOCK DET 4-BIT CHARGE PUMP C1, C0 2-BIT 17-BIT LATCH LATCH DIVIDE RATIO 4-BIT LATCH AND PORT INTERFACE SP5659 + + + + + + + 3 REF/COMP F COMP OSC REFERENCE 2 DIVIDER CRYSTAL F (SEE TABLE 1) REF 1 CHARGE PUMP 16 DRIVE MODE DISABLE CONTROL 2-BIT LATCH 5-BIT LATCH AND ...

Page 4

... SP5659 Preliminary Information ...

Page 5

... Preliminary Information Figure 3 - Data formats SP5659 cont… 5 ...

Page 6

... SP5659 Preliminary Information 300 100 OPERATING WINDOW 40 10 100 1000 2000 FREQUENCY (MHz 300 100 OPERATING WINDOW 40 10 3000 3500 100 300 1000 + - + - + - +- 2000 2700 3000 3500 FREQUENCY (MHz) ...

Page 7

... REF REF/COMP ADDRESS CONTROL MICRO SDA SCL P3 P2 Preliminary Information 1·6GHz REFERENCE CLOCK SP8659 SP8659 SECOND LO 130V 68p 15n 13· OSCILLATOR OUTPUT 4 13 SP5659 ADC SP5659 38·9MHz SP8659 SP8659 112V 22k 16k 47k 2·2n BCW31 TUNER 15V 10n 7 ...

Page 8

... DATA/SDA CLOCK/SCL C13 100p NOTES 1. The circuit diagram shown is designed for use with a number of synthesisers. 2. The LED connected to pin 11 is redundant when an SP5659 is used in this board use an external reference, capacitor C6 must be fitted and capacitor C1 removed from the board. 8 EXTERNAL 15V REFERENCE ...

Page 9

... 0.5 11: O NORMALISED TO 50 Preliminary Information SP5659 SP5659 FREQUENCY MARKERS AT 100MHz, 500MHz, 1GHz AND 2·7GHz SP5659 9 9 ...

Page 10

... SP5659 Preliminary Information V REF 500 500 13 RF INPUT 14 RF INPUT RF inputs 3k SCL/SDA/ADC * ACK * ON SDA ONLY SDA, SCL and ADC CRYSTAL Reference oscillator 10 (O/P DISABLE ADDRESS PORT Output ports Figure 11 - Input/output interface circuits CHARGE PUMP 200 100 16 DRIVE OUTPUT OS Loop amplifier V CC ...

Page 11

For more information about all Zarlink products visit our Web Site at www.zarlink.com ’ ’ “ ” ...

Page 12

...

Page 13

... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...

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