CY62127DV30L-55ZXI Cypress Semiconductor Corporation., CY62127DV30L-55ZXI Datasheet

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CY62127DV30L-55ZXI

Manufacturer Part Number
CY62127DV30L-55ZXI
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY62127DV30L-55ZXI

Case
SOP-44L
Cypress Semiconductor Corporation
Document #: 38-05229 Rev. *H
Features
Functional Description
The CY62127DV30 is a high-performance CMOS static RAM
organized as 64K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
Note:
Logic Block Diagram
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
• Temperature Ranges
• Very high speed: 45 ns
• Wide voltage range: 2.2V to 3.6V
• Pin compatible with CY62127BV
• Ultra-low active power
• Ultra-low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• Available in Pb-Free and non Pb-Free 48-ball FBGA and
— Typical active current: 0.85 mA @ f = 1 MHz
— Typical active current: 5 mA @ f = f
a 44-lead TSOP Type II packages
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
A
A
A
A
A
A
A
A
A
A
A
10
10
3
2
1
0
9
8
7
6
5
4
[1]
MAX
Pow er -Down
Circuit
COLUMN DECODER
DATA IN DRIVERS
198 Champion Court
RAM Array
2048 x 512
64K x 16
®
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption by 90% when addresses are not
toggling. The device can be put into standby mode reducing
power consumption by more than 99% when deselected (CE
HIGH or both BHE and BLE are HIGH). The input/output pins
(I/O
when: deselected (CE HIGH), outputs are disabled (OE
HIGH), both Byte High Enable and Byte Low Enable are
disabled (BHE, BLE HIGH) or during a write operation (CE
LOW and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes
.
0
through I/O
1-Mb (64K x 16) Static RAM
CE
15
San Jose
). If Byte High Enable (BHE) is LOW, then data
BHE
BLE
15
8
) are placed in a high-impedance state
through I/O
,
CA 95134-1709
0
I/O
I/O
to I/O
0
8
–I/O
–I/O
BHE
WE
CE
OE
BLE
7
7
15
. If Byte High Enable (BHE) is
15
0
Revised June 19, 2006
) is written into the location
through A
CY62127DV30
0
15
through I/O
).
8
408-943-2600
to I/O
15
. See
7
), is
0
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CY62127DV30L-55ZXI Summary of contents

Page 1

Features • Temperature Ranges — Industrial: –40°C to 85°C — Automotive: –40°C to 125°C • Very high speed • Wide voltage range: 2.2V to 3.6V • Pin compatible with CY62127BV • Ultra-low active power — Typical active current: ...

Page 2

... Product Portfolio V Range (V) CC Product Min. Typ. Max. CY62127DV30L 2.2 3.0 3.6 CY62127DV30LL 2.2 3.0 CY62127DV30L 3.6 2.2 3.0 CY62127DV30LL 3.6 CY62127DV30L 2.2 3.0 3.6 CY62127DV30LL [2, 3] Pin Configurations FBGA (Top View BLE I/O A BHE I I/O I I/O I DNU NC I/O I I/O I/O ...

Page 3

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature .................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ......................................................................... −0.3V to 3.9V DC ...

Page 4

Thermal Resistance Parameter Description θ Thermal Resistance (Junction to Ambient) JA θ Thermal Resistance (Junction to Case Test Loads and Waveforms OUTPUT 50 pF INCLUDING JIG AND SCOPE Parameters ...

Page 5

Switching Characteristics (Over the Operating Range) Parameter Description Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid ACE t OE LOW to Data ...

Page 6

Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [16,17,18] Read Cycle No. 2 (OE Controlled) [14, 15, 19, 20, 21] Write Cycle No. 1 (WE Controlled) ADDRESS BHE/BLE OE ...

Page 7

Switching Waveforms (continued) [14, 15, 19, 20, 21] Write Cycle No. 2 (CE Controlled) ADDRESS CE WE BHE / BLE OE DATA I/O DON'T CARE t HZOE Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS CE BHE/BLE t SA ...

Page 8

Switching Waveforms (continued) Write Cycle No. 4 (BHE-/BLE-controlled, OE LOW) ADDRESS CE BHE/BLE DATA I/O DON'T CARE Truth Table BHE BLE High High ...

Page 9

... Ordering Information Speed (ns) Ordering Code 45 CY62127DV30LL-45BVXI CY62127DV30LL-45ZXI 55 CY62127DV30LL-55BVI CY62127DV30LL-55BVXI CY62127DV30LL-55ZI CY62127DV30L-55ZXI CY62127DV30LL-55ZXI CY62127DV30L-55BVXE CY62127DV30L-55ZSXE 70 CY62127DV30L-70BVI CY62127DV30LL-70BVXI CY62127DV30L-70ZI CY62127DV30LL-70ZXI Please contact your local Cypress sales representative for availability of these parts Package Diagrams TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05229 Rev. *H ...

Page 10

Package Diagrams (continued) MoBL is a registered trademark, and MoBL2 and More Battery Life are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05229 Rev. *H ...

Page 11

Document History Page Document Title: CY62127DV30 MoBL Document Number: 38-05229 Orig. of REV. ECN NO. Issue Date Change ** 117690 08/27/02 *A 127311 06/13/03 *B 128341 07/22/03 *C 129000 08/29/03 *D 316039 See ECN *E 346982 See ECN *F 369955 ...

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