CY7C144AV-25JC Cypress Semiconductor Corporation., CY7C144AV-25JC Datasheet
CY7C144AV-25JC
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CY7C144AV-25JC Summary of contents
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... CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 4K/8K/16K/32K x 8 organizations (CY7C0138AV/144AV/006AV/007AV) • 4K/8K/16K/32K x 9 organizations (CY7C0139AV/145AV/016AV/017AV) • 0.35-micron CMOS for optimum speed/power • ...
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... PLCC Top View CY7C144AV ( CY7C145AV ( 2728 29 30 3132 ...
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... I/O for CY7C016AV and CY7C017AV only. NC for other parts. 9. Address line for CY7C007AV and CY7C017AV only. NC for other parts. Document #: 38-06051 Rev. *C 64-Pin TQFP Top View CY7C144AV ( 68-Pin PLCC Top View 10 11 ...
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Pin Configurations (continued) I/O 2L I/O 3L I/O 4L I/O 5L GND I GND I/O 0R I I/O 3R I/O 4R I/O 5R Selection Guide Maximum Access Time (ns) Typical ...
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... Interrupts The upper two memory locations may be used for message passing. The highest memory location (FFF for the CY7C138AV/9AV, 1FFF for the CY7C144AV/5AV, 3FFF for the CY7C006AV/16AV, 7FFF for the CY7C007AV/17AV) is the mailbox for the right port and the second-highest memory ...
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Also, an active busy to a port prevents that port from reading its own mailbox and, thus, resetting the interrupt to it application does not require message ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature .................................–65 Ambient Temperature with Power Applied.............................................–55 Supply Voltage to Ground Potential ............... –0.5V to +4.6V DC Voltage Applied to Outputs in ...
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AC Test Loads and Waveforms 3. 590Ω OUTPUT 435Ω (a) Normal Load (Load 1) 3.0V GND . Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC ...
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Switching Characteristics Over the Operating Range Parameter Description t Data Hold From Write End HD [18, 19] t R/W LOW to High Z HZWE [18, 19] t R/W HIGH to Low Z LZWE [20] t Write Pulse to Data Delay ...
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Switching Waveforms Read Cycle No. 1 (Either Port Address Access) ADDRESS OHA DATA OUT PREVIOUS DATA VALID Read Cycle No. 2 (Either Port CE/OE Access DATA OUT CURRENT I SB [24, ...
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Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [34 R/W Note 35 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [34 R/W DATA IN Notes: 29. ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A –A ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 41 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No. 1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No. 2 (Address ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE FFF (See Functional Description R/W L INT R [44] t INS Right Side Clears INT : R ADDRESS R/W R ...
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Table 1. Non-Contending Read/Write Inputs CE R/W OE SEM High Data Out High Data Data Out L L ...
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... Ordering Code 20 CY7C139AV–20JC 25 CY7C139AV–25JC 8K x8 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C144AV–20AC CY7C144AV–20JC 25 CY7C144AV–25AC CY7C144AV-25AXC CY7C144AV–25JC CY7C144AV-25JXC 8K x9 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C145AV–20JC 25 CY7C145AV–25JC 16K x8 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C006AV– ...
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Ordering Information (continued) 16K x9 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C016AV–20JC 25 CY7C016AV–25JC 32K x8 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 20 CY7C007AV–20JC CY7C007AV–20JI 25 CY7C007AV–25JC 32K x9 3.3V Asynchronous Dual-Port SRAM Speed (ns) ...
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Package Diagrams 64-Lead Thin Plastic Quad Flat Pack ( 1.4 mm) A65 64-Lead Pb-Free Thin Plastic Quad Flat Pack ( 1.4mm) A65 68-Lead Pb-Free Plastic Leaded Chip Carrier J81 All products and company names ...
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... Document #: 38-06051 Rev. *C Description of Change Change from Spec number: 38-00837 to 38-06051 RBI Power up requirements added to Maximum Ratings Information Removed cross information from features section Added Pb-Free Logo Added Pb-Free parts to ordering information: CY7C144AV-25AXC, CY7C144AV-25JXC, CY7C006AV-25AXC CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7C007AV/017AV Page [+] Feedback ...