LE77D112TC Zarlink Semiconductor, LE77D112TC Datasheet
LE77D112TC
Related parts for LE77D112TC
LE77D112TC Summary of contents
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... Legerity Holdings. Voice Over Subscriber Line Interface Circuit ORDERING INFORMATION An Le78D11 VoSLAC™ device must be used with this part. Device Le77D112TC 44-pin eTQFP Le77D112BTC 44-pin eTQFP (Green package)* *Green package meets RoHS Directive 2002/95/EC of the European Council to minimize the environmental impact of electrical equipment. ...
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... System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Device Specifications .14 Test Circuit .18 Single Channel Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Application Circuit Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Physical Dimensions .21 44-Pin eTQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Revision .22 Revision .22 Revision .22 Revision .22 Revision .22 Revision .22 2 Zarlink Semiconductor Inc. ...
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... Switcher SD 2 ILS Logic Controller (TIP) Signal 2-Wire Conditioning Interface Signal Transmission Fault Detection BGND BGND AGND VCC Zarlink Semiconductor Inc programmable from mA. SC Loop/Cable DSLAM/ HEADEND WLL F 1 NPRFILT 1 VIN 1 VOUT 1 VHP 1 CFILT 1 LPF 1 IMT 1 RDC ...
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... C REF NPRi ∆t = ----------------------------------- I NPR Figure 3. DC Feed Curve 14 LOOP Zarlink Semiconductor Inc. ) can be LTH (RING). This voltage from the Level Shift block B . This reduced LPFi (TIP) is held constant, while B (RING) is changed )/500 = CS1], all of the LOOP LTH , may be used to increase the transition ...
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... On the positive half cycle of the input waveform, when near –4 V and V A(TIP) B(RING) is brought more negative. The waveform can be either sinusoidal or trapezoidal under the rating is 140 V. Due to the switching efficiency and overhead voltage, CEO = 12 V. See SW 5 Zarlink Semiconductor Inc. .) REF A (TIP ...
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... SW pin to the base of the external power device Zarlink Semiconductor Inc. ) that tracks Tip and Ring voltage for the two- REG . In doing so, the switcher saves power REG 7) is generated on the Le77D11 VoSLIC device 9 Ω ...
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... COMPARATOR 8), summed, attenuated and converted to voltage at the CFILT pin. This voltage then goes ), second is the gain from the four-wire (V 2WIN ) side (G ). OUT 2WIN F V OUT IMT 7 Zarlink Semiconductor Inc. and VSW + + 0. LIMi + ILS - ...
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... R IMT F Figure 7. Transmission Block Diagram R S CFILT VHP i i Sense HPi Zarlink Semiconductor Inc. is the impedance setting resistor, K IMT = 0 Ω and R is 100 k, the terminating F IMT OUT . V 600 Ω VOUT ...
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... Similar to ringing state with reduced bias currents for lower noise. Loop current sensing range is limited. See IMT pin specifications. Not used. Not used. voltage will decay The A REG 9 Zarlink Semiconductor Inc These pins are driven low when pin to indicate a fault condition: i ...
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... Exposed Pad Zarlink Semiconductor Inc. BGND 33 2 CHS 32 2 ILS CHCLK 29 28 VSW ILS 1 25 CHS 1 24 BGND 1 23 ...
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... VoSLIC device Switching Regulators. (Channels 1 and 2). A positive supply used to generate the negative supplies of V Supply V (common to both channels). REG2 Exposed pad on underside of device must be connected to a heat Isolated spreading area. The AGND plane is recommended. 11 Zarlink Semiconductor Inc. Description pin of Le78D11 each LTH and CFILT . 1 2 ...
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... JA 32° C/W θ JC 9.2° C/W JESD22 Class 1C compliant 2 ) internal copper plane. (Refer to Legerity application note Layout Considerations for the REF V REG 12 Zarlink Semiconductor Inc. -40° to 85°C 3.3 V ± 1.40 V ± –7 to –110 Disconnect state) section . ...
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... IN REF = 1400 Ω open --------- - 1400 Ω 0.9 Vpk 1400 Ω 0.9 Vpk Zarlink Semiconductor Inc. Typ Max Unit • +20 Typ Max Unit –4 – 54.5 –58 –66 –54 – ...
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... B(RING) to GND IMT = 600 Ω – --------- - LOOP 525 I < |40 mA < |55 mA| --------- - L 520 I < |90 mA Zarlink Semiconductor Inc. Typ Max Unit Note 135 180 mApk 4. 85.3 kHz 0.28 0.31 V Ω 7000 +1 µA Ω 50 V/µsec − 0.3 V − ...
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... Min 13.7 9.34 7.76 –9.74 –1.78 –0.1 –0.1 –0.1 –0.15 –0.35 2.5 –150 –20 REF –40 REF = 20 kΩ –50 200 –20 –20 0 4.45 2.0 –150 –100 2.4 16 Zarlink Semiconductor Inc. Typ Max Unit Note 14 14.3 9.54 9.74 4. 7.96 8.16 –9.54 –9.34 –1.58 –1.38 +0.1 dB +0.1 +0.1 4. +0.15 4., 7. +0.35 4., 7. –64 –50 –55 –40 – ...
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... Active and Reverse Polarity –110 Standby and Line Test –80 = 100 Ω with respect V = 0.7V REF I = 1mA 2.8 IMT (Ring) pins 600 Ω. LAC 17 Zarlink Semiconductor Inc. Typ Max Unit 1 MΩ –5 +5 +180 +110 +80 80 120 Note 3. µ ...
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... W Resistor 475 K 1% 1/16 W Resistor 237 k 1% 1/8 W Resistor 1/ Zarlink Semiconductor Inc. SW Comments Panasonic / ECJ-1VB1H102K, 0603 Kemet C0603C273K5RAC Panasonic / ECJ-1VF1C104Z, 0603 CalChip GMC31X7R104K200NT Panasonic / ECJ-1VB1C104K (optional) CalChip GMC31X7R104K200NT Panasonic / ECJ-2YB0J155K,0805 Panasonic ECS-TOJY475R Tecate CMC-300/105KX1825T060 Nichicon / UPW1E221MPH DIGI-KEY / PCC1840CT-ND,0805 General Semi. / ES2C ...
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... Markings will vary with the mold tool used in manufacturing. Min Nom Max Min Symbol - - 1.20 c 0.09 0.05 - 0.15 L 0.45 0.95 1.00 1. BSC S 0.20 10 BSC b 0.17 12 BSC e 10 BSC D2 0.08 - 0. aaa 0 deg 3.5 deg 7 deg bbb 0 deg - - ccc 11 deg 12 deg 13 deg ddd 11 deg 12 deg 13 deg N 44-Pin eTQFP 21 Zarlink Semiconductor Inc. Nom Max - 0.20 0.60 0.75 1.00 REF - - 0.20 0.27 0.80 BSC 8.00 8.00 0.20 0.20 0.10 0.20 44 ...
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... Enhanced format of package drawing in • Added new headers/footers due to Zarlink purchase of Legerity on August 3, 2007 , the following changes were made: , Ringing operation state, removed condition 70° and C ESRi VREGi FLi to 1 µF VREG1 Physical Dimensions, on page 21 22 Zarlink Semiconductor Inc VREG1 ...
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... I C Standard Specification as defined by Philips. Zarlink, ZL, the Zarlink Semiconductor logo are trademarks, and Legerity, the Legerity logo and combinations thereof are registered trademarks of Zarlink Semiconductor Inc. All other trademarks and registered trademarks are the property of their respective owners. © 2007 Zarlink Semiconductor Inc. All Rights Reserved. ...