CY2212ZC-2 Cypress Semiconductor Corporation., CY2212ZC-2 Datasheet

no-image

CY2212ZC-2

Manufacturer Part Number
CY2212ZC-2
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2212ZC-2
Manufacturer:
CYP
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-07466 Rev. *A
Features
Logic Block Diagram
Pin Configuration
Frequency Select Table
• Direct Rambus™ clock support
• High-speed clock support
• Input Select option
• Crystal Oscillator Divider Output
• Output edge-rate control
• 16-pin TSSOP
S
0
1
XOUT
Xtal Value = 18.75 MHz
XIN
S
M (PLL Multiplier)
64/3
Oscillator
16
Xtal
CLK,CLKB
300 MHz
400 MHz
Direct Rambus™ Clock Generator (Lite)
3901 North First Street
VDDP
VSSP
XOUT
VDDL
LCLK
VSSL
XIN
NC
16-pin TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
/2
9.375 MHz
9.375 MHz
Benefits
LCLK
• One pair of differential output drivers
• 400-MHz maximum, 300-MHz minimum output
• PLL multiplier select
• LCLK = XTAL/2, not driven by phase-locked loop (PLL)
• Minimize EMI
• Space-saving, low-cost package
16
15
14
13
12
11
10
9
frequency
S
VDD
VSS
CLK
CLKB
VSS
VDD
NC
PLL
xM
San Jose
,
CA 95134
Revised January 12, 2005
408-943-2600
LCLK
CLK
CLKB
CY2212
[+] Feedback

Related parts for CY2212ZC-2

CY2212ZC-2 Summary of contents

Page 1

Features • Direct Rambus™ clock support • High-speed clock support • Input Select option • Crystal Oscillator Divider Output • Output edge-rate control • 16-pin TSSOP Logic Block Diagram XIN Xtal Oscillator XOUT S Xtal Value = 18.75 MHz Pin ...

Page 2

Pin Description Name Pin Description VDDP 1 3.3V Power Supply for PLL VSSP 2 Ground for PLL XOUT 3 Reference Crystal Feedback XIN 4 Reference Crystal Input VDDL 5 1.8V Power Supply for LCLK LCLK 6 LVCMOS Output, x1/2 Crystal ...

Page 3

DC Electrical Specifications Parameter Description V Supply voltage DD V LCLK supply voltage DDL T Ambient operating temperature A V Input signal low voltage at pin Input signal high voltage at pin Internal pull-up ...

Page 4

AC Device Specifications (continued) Parameter Output rise and fall times (measured at 20%–80% of output voltage Difference between output rise and fall times on the same pin of a single CR, CF device (20%–80%) ...

Page 5

Figure 3 below shows the clock driver implemented as a push-pull driver. When stimulating the output driver, the trans- mission lines shown in Figure 3 can be replaced by a direct connection to the termination resistors, R external components are ...

Page 6

Dual-Channel Output Driver Figure 4 shows the clock driver driving two high-impedance channels. The purpose of the series resistors R decouple the two channels, and prevent noise from one channel from coupling onto the second channel. With Z 40 ohms ...

Page 7

CLK CLKB CLK CLKB t CYCLE t CLK CLKB t CYCLE Figure 9 shows the definition of cycle-to-cycle jitter with respect to the falling edge of the CLK signal. Cycle-to-cycle jitter is the difference between cycle ...

Page 8

CLK CLKB t 4CYCLE 4CYCLE,i Cycle i CLK CLKB t CYCLE,i+1 LCLK T Figure 12 shows the definition of LCLK cycle jitter and LCLK 10-cycle jitter. These parameters apply to the LCLK output, and not to ...

Page 9

... Figure 13. Example Jitter Measurement Histogram Ordering Information Ordering Code CY2212ZC-2 16-lead TSSOP CY2212ZC-2T 16-lead TSSOP–Tape and Reel Lead-Free CY2212ZXC-2 16-lead TSSOP CY2212ZXC-2T 16-lead TSSOP–Tape and Reel Package Drawing and Dimensions 1 4.30[0.169] 4.50[0.177] 16 0.65[0.025] BSC. 0.19[0.007] 0.30[0.012] 0.05[0.002] 0.85[0.033] 0.15[0.006] ...

Page 10

Document History Page Document Title: CY2212 Direct Rambus™ Clock Generator (Lite) Document Number: 38-07466 Issue REV. ECN NO. Date ** 117801 12/10/02 *A 308300 See ECN Document #: 38-07466 Rev. *A Orig. of Change Description of Change CKN New Data ...

Related keywords