CY24242 Cypress Semiconductor Corporation., CY24242 Datasheet
CY24242
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CY24242 Summary of contents
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... Table 2. Spread Characteristics. SSON Pin Configuration REF CPU0:3 SDRAM0:3 USBCLK • 3901 North First Street • CY24242 [1] CPU(0:3), SDRAM(0:3) USBCLK 133.3 MHz 48 MHz 100 MHz 48 MHz 66.6 MHz 48 MHz 50 MHz 48 MHz CPU(0:3), SS%1 SS%0 SDRAM(0: –0. –1.0% ...
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... Power Connection: Power supply for the USB output. Connect to 3.3V or 2.5V supply. P Power Connection: Power supply for the CPU outputs. Connect to 3.3V or 2.5V supply. P Power Connection: Power supply for the SDRAM outputs. Connect to 3.3V or 2.5V supply. G Ground Connections: Connect all ground pins to the common system ground plane. CY24242 Pin Description Page ...
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... Contact your local Sales representative for details on these devices. Spread Spectrum clocking is activated or deactivated by selecting the appropriate values for bits 1–0 in data byte 0 of the SMBus data stream. EMI Reduction Spread Spectrum Enabled -SS% Frequency Span (MHz) Figure 2. Typical Modulation Profile CY24242 Non- Spread Spectrum Page ...
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... X1 input threshold voltage (typical DDQ 7. The CY24242 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF; this includes typical stray capacitance of short PCB traces to crystal input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected). ...
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... Measured on rising edge at 1.5V. Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to frequency stabilization. Average value during switching transition. Used for determining series termination value. CY24242 = 3.3V) CPU = 66 MHz CPU = 100 MHz Min. Typ. Max. Min. Typ. Max. 15 – ...
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... Operation of the device at these or any other condi- tions above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability. Description CY24242 CPU = 66/100MHz Min. Typ. Max. Unit 14 ...
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... Measured on rising edge at 1.25V Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to frequency stabilization. Average value during switching transition. Used for determining series termination value. CY24242 = 2.5V) CPU = 66 MHz CPU = 100 MHz Min. Typ. Max. Min. Typ. Max. 15 – ...
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... Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to frequency stabilization. Average value during switching transition. Used for determining series termination value. Package Type CY24242 CPU = 66/100 MHz Min. Typ. Max. Unit 14.318 MHz 0.5 – ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY24242 51-85079-*D ...
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... Document History Page Document Title: CY24242 Laser Printer System Frequency Synthesizer Document Number: 38-07268 Issue REV. ECN NO. Date ** 110533 10/08/01 *A 122866 12/20/02 *B 310556 See ECN *C 2896383 03/19/10 *D 2915602 04/16/10 Document #: 38-07268 Rev. *D Orig. of Change SZV Change from Spec number: 38-01133 to 38-07268 RBI Added power-up requirements to maximum ratings information. ...