CY28439ZXC Cypress Semiconductor Corporation., CY28439ZXC Datasheet

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CY28439ZXC

Manufacturer Part Number
CY28439ZXC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number:
CY28439ZXC
Manufacturer:
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Quantity:
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Part Number:
CY28439ZXC
Quantity:
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Cypress Semiconductor Corporation
Document #: 38-07668 Rev. *D
Features
• Compliant to Intel
• Supports Intel Prescott and Tejas CPU
• Selectable CPU frequencies
• Differential CPU clock pairs
• 100-MHz differential SRC clocks (two selectable
• 96-MHz differential dot clock
• 48-MHz USB clocks
• 33-MHz PCI clock
• Dial-A-Frequency
Block Diagram
between Fixed and Overclocking)
VTTPWR_GD#/PD
FS_[E:A]
SDATA
SCLK
Xout
Xin
14.318MHz
Crystal
Logic
I2C
CK410
SATA
PLL1
PLL2
PLL3
PLL4
Fixed
CPU
SRC
PLL Reference
Divider
Divider
Divider
Divider
Clock Generator for Intel
Watchdog
Timer
3901 North First Street
PRELIMINARY
IREF
VDD_CPU
CPUT
CPUC
VDD_SRC
SRCT (PCI Ex)
SRCC (PCI Ex)
VDD_SRC
SRCT4_SATA
SRCC4_SATA
VDD_48Mhz
DOT96T
DOT96C
SRESET#
VDD_RE
RE
F
VDD_48
USB48
VDD_48
24/48
VDD_PCI
PCI
VDD_PCI
PCIF
F
CPU SRC
• Watchdog
• Two independent overclocking PLLs
• Low-voltage frequency select input
• I
• Ideal Lexmark Spread Spectrum profile for maximum
• 3.3V power supply
• 56-pin SSOP and TSSOP packages
x 2
electromagnetic interference (EMI) reduction
2
C support with readback capabilities
Pin Configuration
x 6
**SEL24_48#/24_48M
VTTPWRGD#/PD
* Indicates internal pull-up
** Indicates internal pull-down
San Jose
SRCC_SATAC
PCI
SRCT_SATAT
x 9
**FS_A/PCIF1
*FS_B/PCIF2
*FS_E/PCI4
VDD_SRC
VDD_SRC
VSS_SRC
VSS_SRC
VDD_PCI
VSS_PCI
VSS_PCI
DOT96C
DOT96T
VDD_48
VSS_48
SRCC0
SRCC1
SRCC2
SRCT0
SRCT1
SRCT2
USB48
PCIF0
PCI3
PCI5
REF DOT96
x 2
Grantsdale Chipset
,
CA 95134
10
11
1
2
3
4
5
6
7
8
9
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
x 1
Revised June 13, 2005
USB
x 1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
408-943-2600
CY28439
VDD_PCI
PCI2
PCI1
PCI0
SRESET#
REF1/FS_C**
REF0/FS_D**
VSS_REF
XIN
XOUT
VDD_REF
SCLK
SDATA
CPUT0
CPUC0
VDD_CPU
CPUT1
CPUC1
VSS_CPU
IREF
VSSA
VDDA
VDD_SRC
SRCT4
SRCC4
SRCT3
SRCC3
VSS_SRC
24-48M
x 1

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CY28439ZXC Summary of contents

Page 1

Clock Generator for Intel Features  • Compliant to Intel CK410 • Supports Intel Prescott and Tejas CPU • Selectable CPU frequencies • Differential CPU clock pairs • 100-MHz differential SRC clocks (two selectable between Fixed and Overclocking) • 96-MHz ...

Page 2

Pin Description Pin No. Name Type 6,56 VDD_PCI PWR 3.3V power supply for outputs. 1,5 VSS_PCI GND 3 FS_E/PCI4 I,O, PU,SE 2,4,53,54, PCI O, SE 33-MHz clocks PCIF0 O,SE 33-MHz free running clock 8 FS_A/PCIF1 I/O,PD ...

Page 3

Frequency Select Pins (FS_[A:E]) Host clock frequency selection is achieved by applying the appropriate logic levels to FS_A, FS_B, FS_C, FS_D, and FS_E inputs prior to VTT_PWRGD# assertion (as seen by the clock synthesizer). Upon VTT_PWRGD# being sampled LOW by ...

Page 4

Table 1. Command Code Definition Bit Block read or block write operation Byte read or byte write operation (6:0) Byte offset for byte read or byte write operation. For block read or block write operations, ...

Page 5

Control Registers Byte 0: Control Register 0 Bit @Pup 7 1 RESERVED 6 1 SRC[T/C SRC[T/C SATA[T/ SRC[T/C SRC[T/C RESERVED 0 1 SRC[T/C]0 Byte 1: Control Register 1 Bit @Pup ...

Page 6

Byte 2: Control Register 2 (continued) Bit @Pup 0 1 Byte 3: Control Register 3 Bit @Pup 7 0 RESERVED SATA[T/ RESERVED 0 0 Byte 4: Control Register ...

Page 7

Byte 6: Control Register 6 Bit @Pup 7 0 TEST_SEL 6 0 TEST_MODE PCI, PCIF and SRC clock outputs except those set to free running Byte 7: Vendor ...

Page 8

Byte 9: Control Register 9 Bit @Pup 7 0 RESERVED FSEL_D 2 0 FSEL_C 1 0 FSEL_B 0 0 FSEL_A Byte 10: Control Register 10 Bit @Pup 7 0 Recovery_Frequency 6 0 ...

Page 9

Byte 12: Control Register 12 Bit @Pup 7 0 CPU_DAF_N8 6 0 CPU_DAF_M6 5 0 CPU_DAF_M5 4 0 CPU_DAF_M4 3 0 CPU_DAF_M3 2 0 CPU_DAF_M2 1 0 CPU_DAF_M1 0 0 CPU_DAF_M0 Byte 13: Control Register 13 Bit @Pup 7 0 ...

Page 10

Byte 15: Control Register 15 (continued) Bit @Pup 2 0 Recovery Recovery Recovery N0 Byte 16: Control Register 16 Bit @Pup SRC_FREQ_SEL 4 0 RESERVED 3 0 SRC_SATA ...

Page 11

Calculating Load Capacitors In addition to the standard external trim capacitors, trace capacitance and pin capacitance must also be considered to correctly calculate crystal loading. As mentioned previously, the capacitance on each side of the crystal is in series with ...

Page 12

FS_Override—This bit allows the CPU frequency to be selected from HW or FSEL settings. By default, this bit is not set and the CPU frequency is selected by HW. When this bit is set, the CPU frequency is selected by ...

Page 13

Manual Recovery When this recovery mode is selected, in the event of a Watchdog timeout, the N value as programmed by the user in the N recovery register, and the M value that is stored in the Recovery M register ...

Page 14

PD CPUT, 133MHz CPUC, 133MHz SRCT 100MHz SRCC 100MHz USB, 48MHz DOT96T DOT96C PCI, 33MHz REF Figure 5. Power-down Deassertion Timing Waveform FS_A, FS_B,FS_C VTT_PW RGD# PW RGD_VRM VDD Clock Gen Clock State State 0 Off Clock Outputs Off Clock ...

Page 15

Absolute Maximum Conditions Parameter Description V Core Supply Voltage DD V Analog Supply Voltage DD_A V Input Voltage IN T Temperature, Storage S T Temperature, Operating Ambient A T Temperature, Junction J Ø Dissipation, Junction to Case JC Ø Dissipation, ...

Page 16

AC Electrical Specifications Parameter Description Crystal T XIN Duty Cycle DC T XIN Period PERIOD XIN Rise and Fall Times XIN Cycle to Cycle Jitter CCJ L Long-term Accuracy ACC CPU at 0.7V (SSC ...

Page 17

AC Electrical Specifications Parameter Description T CPUT/C Cycle to Cycle Jitter CCJ L Long Term accuracy ACC CPUT and CPUC Rise and Fall Times Rise/Fall Matching RFM ∆T Rise Time Variation R ∆T Fall ...

Page 18

AC Electrical Specifications Parameter Description T Any PCI clock to Any PCI clock Skew SKEW T PCIF and PCI Cycle to Cycle Jitter CCJ DOT T DOT96T and DOT96C Duty Cycle DC T DOT96T and DOT96C Period PERIOD T DOT96T ...

Page 19

AC Electrical Specifications Parameter Description T Long Term jitter LTJ T Long Term jitter LTJ REF T REF Duty Cycle DC T REF Period PERIOD T REF Absolute Period PERIODAbs Edge Rate Rising edge rate Edge Rate Falling edge rate ...

Page 20

... Part Number Lead-free CY28439OXC 56-pin SSOP CY28439OXCT 56-pin SSOP – Tape and Reel CY28439ZXC 56-pin TSSOP CY28439ZXCT 56-pin TSSOP – Tape and Reel Document #: 38-07668 Rev. *D PRELIMINARY 3 3 Ω Ω Ω D iff tia Ω Ω ...

Page 21

... C Patent Rights to use these components defined by Philips. Intel and Pentium are registered trademarks of Intel Corporation. Dial-A-Frequency is a registered trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07668 Rev. *D © ...

Page 22

Document History Page Document Title: CY28439 Clock Generator for Intel Document Number: 38-07668 REV. ECN NO. Issue Date ** 214024 See ECN *A 268615 See ECN *B 314353 See ECN *C 321473 See ECN *D 378834 See ECN Document #: ...

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