CY7C1009V33-20VC Cypress Semiconductor Corporation., CY7C1009V33-20VC Datasheet

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CY7C1009V33-20VC

Manufacturer Part Number
CY7C1009V33-20VC
Description
128K x 8 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number:
CY7C1009V33-20VC
Manufacturer:
CY
Quantity:
1 593
Features
Functional Description
The CY7C109V33/CY7C1009V33 is a high-performance
CMOS static RAM organized as 131,072 words by 8 bits. Easy
Selection Guide
Shaded areas contain preliminary information.
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Operating Current (mA) Low Power Version
Maximum CMOS Standby Current (mA) Standard
Maximum CMOS Standby Current (mA) Low Power Version
• High speed
• V
• Low active power
• Low CMOS standby power
• 2.0V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
WE
CE
CE
OE
Logic Block Diagram
— t
— 432 mW (max.)
— 288 mW (L version)
— 18 mW (max.)
— 7.2 mW (L version)
1
2
CC
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
AA
= 3.3V ± 10%
= 15, 20, 25ns
INPUT BUFFER
512 x 256 x 8
DECODER
COLUMN
ARRAY
1
POWER
DOWN
, CE
2
, and OE options
3901 North First Street
7C1009V33-12
7C109V33-12
109V33–1
memory expansion is provided by an active LOW Chip Enable
(CE
put Enable (OE), and three-state drivers. Writing to the device
is accomplished by taking Chip Enable one (CE
Enable (WE) inputs LOW and Chip Enable two (CE
HIGH. Data on the eight I/O pins (I/O
written into the location specified on the address pins (A
through A
Reading from the device is accomplished by taking Chip En-
able one (CE
Write Enable (WE) and Chip Enable two (CE
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH or CE
during a write operation (CE
The
400-mil-wide SOJ package. The CY7C1009V33 is available in
a 32-pin, 300-mil-wide SOJ package. The CY7C1009V33 and
CY7C109V33 are functionally equivalent in all other respects.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
130
12
90
5
2
0
1
2
3
4
5
6
7
1
), an active HIGH Chip Enable (CE
CY7C109V33
CE
V
WE
A
A
A
A
A
A
NC
16
A
A
CC
A
A
A
A
13
15
16
14
12
11
9
8
2
7
6
5
4
).
San Jose
2
7C1009V33-15
7C109V33-15
1
LOW), the outputs are disabled (OE HIGH), or
) and Output Enable (OE) LOW while forcing
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
120
15
80
5
2
128K x 8 Static RAM
Pin Configurations
GND
I/O
I/O
I/O
is
A
A
A
NC
A
A
A
A
A
A
A
A
16
14
12
6
5
4
3
2
1
0
0
1
2
7
available
(not to scale)
1
Top View
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
7C1009V33-20
LOW, CE
CA 95134
Top View
7C109V33-20
TSOP I
SOJ
0
through I/O
110
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CY7C1009V33
20
70
5
2
CY7C109V33
2
0
in
2
CE
A
CE
I/O
I/O
I/O
I/O
I/O
V
A
WE
A
A
A
A
OE
HIGH, and WE LOW).
), an active LOW Out-
CC
10
through I/O
15
13
8
9
11
7
6
5
4
3
2
1
September 3, 1999
standard
109V33–2
7
) are placed in a
7C1009V33-25
2
7C109V33-25
) HIGH. Under
408-943-2600
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
) and Write
110
7
20
70
5
2
109V33–3
) is then
2
32-pin,
OE
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
) input
10
0
1
2
3
7
6
5
4
3
2
1
0
0
1

Related parts for CY7C1009V33-20VC

CY7C1009V33-20VC Summary of contents

Page 1

... HIGH or CE LOW), the outputs are disabled (OE HIGH during a write operation (CE , and OE options 2 The CY7C109V33 400-mil-wide SOJ package. The CY7C1009V33 is available in a 32-pin, 300-mil-wide SOJ package. The CY7C1009V33 and CY7C109V33 are functionally equivalent in all other respects. I/O 0 I/O 1 I/O 2 I/O A ...

Page 2

... < MAX Max > V – 0.3V < 0.3V > V – 0.3V < 0.3V, f CY7C1009V33 CY7C109V33 [1] ................................. –0. Ambient [2] Temperature +70 C 3.3V 300mV 7C109V33-12 7C1009V33-15 7C1009V33-12 7C109V33–15 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 ...

Page 3

... V > V – 0.3V < 0.3V, f=0 IN Test Conditions MHz 3. 480 3V 3.0V R2 GND 5 pF 255 INCLUDING JIG AND SCOPE (b) 109V33–4 3 CY7C1009V33 CY7C109V33 7C1009V33-20 7C1009V33-25 7C109V33-20 7C109V33-25 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 0.3 + 0.3 –0.3 0.8 –0.3 0.8 –1 +1 –1 +1 – ...

Page 4

... V – 0. > V – 0. less than less than t , and t HZCE LZCE HZOE LZOE LOW, CE HIGH, and WE LOW HZWE 4 CY7C1009V33 CY7C109V33 7C1009V33-20 7C1009V33-25 7C109V33-20 7C109V33-25 Max. Min. Max. Min. Max. Unit ...

Page 5

... AA t OHA DOE DATA VALID 50% [12, 13 SCE SCE PWE t SD DATA VALID , transition HIGH CY7C1009V33 CY7C109V33 DATA VALID 109V33–6 t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB 109V33– 109V33–8 ...

Page 6

... During this period the I/Os are in the output state and input signals should not be applied. [12, 13 SCE t SCE PWE t SD DATA VALID IN [13 SCE t SCE PWE t SD DATA VALID 6 CY7C1009V33 CY7C109V33 109V33– LZWE 109V33–10 ...

Page 7

... Ordering Code 12 CY7C109V33-12VC CY7C1009V33-12VC CY7C1009V33L-12VC CY7C109V33-12ZC 15 CY7C109V33–15VC CY7C1009V33-15VC CY7C1009V33L-15VC CY7C109V33-15ZC 20 CY7C109V33–20VC CY7C109V33–20ZC CY7C109V33L–20VC CY7C109V33L–20ZC CY7C1009V33-20VC CY7C1009V33L-20VC 25 CY7C109V33–25VC CY7C109V33L–25VC CY7C109V33L–25ZC CY7C1009V33L-25VC CY7C1009V33-25VC Shaded areas contain preliminary information. Document #: 38–00635–A I/O –I/O Mode 0 7 Power-Down ...

Page 8

... Package Diagrams 32-Lead (300-Mil) Molded SOJ V32 32-Lead (400-Mil) Molded SOJ V33 8 CY7C1009V33 CY7C109V33 51-85041-A 51-85033-A ...

Page 9

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 32-Lead Thin Small Outline Package Z32 CY7C1009V33 CY7C109V33 51-85056-B ...

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