CY7C1041V33-20VC Cypress Semiconductor Corporation., CY7C1041V33-20VC Datasheet

no-image

CY7C1041V33-20VC

Manufacturer Part Number
CY7C1041V33-20VC
Description
256K x 16 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
V33
Features
Functional Description
The CY7C1041V33 is a high-performance CMOS Static RAM
organized as 262,144 words by 16 bits.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
Selection Guide
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA) Com’l/Ind’l
Shaded areas contain preliminary information.
• High speed
• Low active power
• Low CMOS standby power (Commercial L version)
• 2.0V Data Retention (600 W at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
A
A
A
A
A
A
A
A
A
Logic Block Diagram
0
1
2
3
4
5
6
7
8
— t
— 612 mW (max.)
— 1.8 mW (max.)
AA
= 15 ns
INPUT BUFFER
1024 x 4096
DECODER
COLUMN
256K x 16
ARRAY
Com’l
0
through I/O
3901 North First Street
L
7
1041V33-12 1041V33-15 1041V33-17 1041V33-20 1041V33-25
), is
I/O
I/O
0
190
8
0.5
12
8
– I/O
– I/O
BHE
WE
CE
OE
BLE
1041V33–1
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1041V33 is available in a standard 44-pin
400-mil-wide body width SOJ and 44-pin TSOP II package
with center power and ground (revolutionary) pinout.
7
15
170
0.5
17
15
8
San Jose
). If Byte High Enable (BHE) is LOW, then data
256K x 16 Static RAM
8
through I/O
Pin Configuration
0
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
WE
CE
CC
160
A
A
A
A
A
A
A
A
A
A
SS
0.5
to I/O
17
8
5
6
7
8
9
0
1
2
3
4
0
1
2
3
4
5
6
7
0
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
CA 95134
through I/O
Top View
TSOP II
7
. If Byte High Enable (BHE) is
15
SOJ
0
) is written into the location
through A
CY7C1041V33
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
150
0.5
20
8
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
A
15
17
16
15
SS
CC
14
13
12
11
10
) are placed in a
15
14
13
12
11
10
9
8
17
1041V33–2
).
8
408-943-2600
June 2, 1999
to I/O
130
0.5
25
8
15
. See
0

Related parts for CY7C1041V33-20VC

CY7C1041V33-20VC Summary of contents

Page 1

... TTL-compatible inputs and outputs • Easy memory expansion with CE and OE features Functional Description The CY7C1041V33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable ...

Page 2

... < MAX Max Com’l/Ind’ > V – 0.3V, CC Com’ > V – 0.3V < 0.3V, f CY7C1041V33 [1] ................................ –0. 0.5V CC Ambient [2] Temperature +70 C 3.3V 0.3V – +85 C 7C1041-12V33 7C1041V33-15 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 ...

Page 3

... IN IL MAX Max Com’l/Ind’ > V – 0.3V, CC Com’ > V – 0.3V < 0.3V, f=0 IN Test Conditions MHz VENIN EQUIVALENT 3.3V 167 1.73V (b) GND CY7C1041V33 Max. Min. Max. 2.4 2.4 2.4 0.4 0.4 0 0.5 0.5 0.5 0.8 –0.5 0.8 –0.5 0.8 –1 +1 –1 +1 – ...

Page 4

... HZCE LZCE HZOE LZOE HZWE HZWE 4 CY7C1041V33 1041V33-15 1041V33-17 Min. Max. Min. Max ...

Page 5

... Over the Operating Range (For L version only) [10] Conditions 2.0V > V – 0.3V > V – 0. < 0. CY7C1041V33 1041V33-25 Max. Min. Max. Unit ...

Page 6

... WE is HIGH for read cycle. 13. Address valid prior to or coincident with CE transition LOW. DATA RETENTION MODE 3.0V V > CDR OHA DOE LZOE DATA VALID 50 CY7C1041V33 3. 1041V33–5 DATA VALID 1041V33-6 t HZOE t HZCE t HZBE HIGH IMPEDANCE ICC CC 50% I ISB SB 1041V33-7 ...

Page 7

... Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state SCE PWE PWE t SCE CY7C1041V33 1041V33 1041V33-9 ...

Page 8

... Read All Bits High Z Read Lower Bits Only Data Out Read Upper Bits Only Data In Write All Bits High Z Write Lower Bits Only Data In Write Upper Bits Only High Z Selected, Outputs Disabled 8 CY7C1041V33 LZWE 1041V33-10 Mode Power Standby (I SB Active (I ...

Page 9

... CY7C1041V33 -12VC CY7C1041V33L-12VC CY7C1041V33 - 12ZC CY7C1041V33L-12ZC 15 CY7C1041V33 -15VC CY7C1041V33L-15VC CY7C1041V33 - 15ZC CY7C1041V33L-15ZC 17 CY7C1041V33 - 17VC CY7C1041V33L-17VC CY7C1041V33 - 17ZC CY7C1041V33L-17ZC 20 CY7C1041V33 - 20VC CY7C1041V33L-20VC CY7C1041V33 - 20ZC CY7C1041V33L-20ZC 25 CY7C1041V33 - 25VC CY7C1041V33L-25VC CY7C1041V33 - 25ZC CY7C1041V33L-25ZC Document #: 38–00645–B Package Name Package Type V34 44-Lead (400-Mil) Molded SOJ ...

Page 10

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Lead (400-Mil) Molded SOJ V34 44-Pin TSOP II Z44 CY7C1041V33 51-85082-B 51-85087-A ...

Related keywords