CY7C4292-25ASC Cypress Semiconductor Corporation., CY7C4292-25ASC Datasheet
CY7C4292-25ASC
Related parts for CY7C4292-25ASC
CY7C4292-25ASC Summary of contents
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... Functional Description The CY7C4282/CY7C4292 are high-speed, low-power, FIFO memories with clocked read and write interfaces. All devices are nine bits wide. The CY7C4282/CY7C4292 can be cascaded to increase FIFO depth. Programmable features include Almost Full/Almost Empty flags. These FIFOs provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, video and communications buffering ...
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... CY7C4292 GND GND 40 N GND 35 34 FL/RT 33 N/C 7C4282/92-15 7C4282/92-25 66 CY7C4292 128k x 9 64-pin 10x10 STQFP Page Unit MHz ...
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... LOW 0 8 maintains the data of the last valid read on its Q even after additional reads occur. after RS is taken RSF CY7C4282 CY7C4292 pins is written into the FIFO on each rising edge outputs. New data will be presented on each rising Page all SS ENS 0– ...
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... LOW-to-HIGH transition of WCLK by one flip-flop and is set LOW when the number of unread words in the FIFO 0 is greater than or equal to CY7C4282 (64K – m) and CY7C4292 (128K – m). PAF is set HIGH by the LOW-to-HIGH (MSB) Default Value = 000h transition of WCLK when the number of available memory locations is greater than m ...
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... Programmable Almost Empty/Almost Full Flag The CY7C4282/CY7C4292 features programmable Almost Empty and Almost Full Flags. Each flag can be programmed (described in the Programming section) a specific distance from the corresponding boundary flags (Empty or Full). When the FIFO contains the number of words or fewer for which the ...
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... Figure 2. Block Diagram of 64K × 9/128K × Deep Sync FIFO Memory Used Document #: 38-06009 Rev. *B RESET (RS) 9 CY7C4282/ FIRST LOAD (FL) EXPANSION IN (XI Width Expansion Configuration CY7C4282 CY7C4292 RESET (RS) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUT ENABLE (OE) PROGRAMMABLE (PAF) EMPTY FLAG (EF) EF DATA OUT ( Page ...
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... RCLK WCLK REN WEN OE RS 7C4282 D Q 7C4292 WCLK RCLK WEN REN RS 7C4282 OE 7C4292 FIRST LOAD (FL) CY7C4282 CY7C4292 DATA OUT (Q) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUTENABLE (OE) EF Page ...
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... V < Com’l Ind Com’l Ind Description Test Conditions MHz 5.0V CC [10, 11] 3.0V R2 GND 680 1.91V . CY7C4282 CY7C4292 0. Ambient Temperature 0°C to +70°C [5] 40°C to +85°C Max. Min. Max. Min. 2.4 2.4 0.4 0.4 V 2 0.8 0.5 0.8 0.5 +10 10 ...
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... Document #: 38-06009 Rev. *B 7C4282/92-10 7C4282/92-15 Min. Max. 100 4.5 4.5 3 0 [13 [13 CY7C4282 CY7C4292 7C4282/92-25 Min. Max. Min. Max. Unit 66.7 40 MHz ...
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... REF [15] t SKEW1 , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW2 CY7C4282 CY7C4292 ENH NO OPERATION t WFF t REF VALID DATA t OHZ Page ...
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... RS t RSF t RSF t RSF D 1 [19] t FRL t SKEW1 t REF t OLZ t OE (maximum When t < minimum specification, t CLK SKEW2 SKEW1 CY7C4282 CY7C4292 t RSR [18] OE=1 OE [20 (maximum) = either 2 FRL CLK SKEW1 Page 4282– ...
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... DATA IN OUTPUT REGISTER 0 8 Document #: 38-06009 Rev. *B [19 REF REF DATA WRITE t WFF t ENH t A DATA READ CY7C4282 CY7C4292 t DS DATA WRITE 2 t ENH t ENS [19] t FRL t t SKEW1 DATA READ NO WRITE [14] t SKEW1 t t WFF WFF ...
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... Note [22] [21] t PAE t 24 Note t CLKL t t ENS ENH t PAF (M+1)WORDS IN FIFO (m 1) words of the FIFO when PAF goes LOW. m words for CY4292. CY7C4282 CY7C4292 WORDS Note IN FIFO t t ENS ENS ENH FULL M WORDS [25] IN FIFO [26 PAF SKEW2 ...
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... ENH PAE OFFSET PAE OFFSET LSB MSB t CLKL t ENH t A UNKNOWN PAE OFFSET LSB t PRT to update these flags. RTR CY7C4282 CY7C4292 PAF OFFSET PAF OFFSET LSB MSB PAF OFFSET MSB PAF OFFSET PAE OFFSET MSB LSB t RTR . RTR Page ...
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... CY7C4292-10ASC CY7C4292-10ASI 15 CY7C4292-15ASC 25 CY7C4292-25ASC Package Diagram 64-Pin Thin Plastic Quad Flat Pack ( 1.4 mm) A64 All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-06009 Rev. *B © Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product ...
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... Document History Page Document Title: CY7C4282/CY7C4292 64K/128K × 9 Deep Sync FIFOs with Retransmit and Depth Expansion Document Number: 38-06009 REV. ECN NO. Issue Date ** 106470 07/17/01 *A 122261 12/26/02 *B 127855 08/25/03 Document #: 38-06009 Rev. *B Orig. of Change SZV Changed from Spec Number: 38-00594 to 38-06009 RBI Added power-up requirements to Maximum Ratings Information ...