AD8801 Analog Devices, AD8801 Datasheet
AD8801
Specifications of AD8801
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AD8801 Summary of contents
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... This data word is decoded where the first 3 bits determine the address of the DAC register to be loaded with the last 8 bits of data. The AD8801/AD8803 consumes only 5 A from 5 V power supplies. In addition, in shutdown mode reference input current consumption is also re- duced while saving the DAC latch settings for use after return to normal operation ...
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... AD8801/AD8803–SPECIFICATIONS Parameter STATIC ACCURACY Specifications Apply to All DACs Resolution Integral Nonlinearity Error Differential Nonlinearity Full-Scale Error Zero-Code Error DAC Output Resistance Output Resistance Match REFERENCE INPUT 2 Voltage Range Input Resistance 3 Reference Input Capacitance DIGITAL INPUTS Logic High Logic Low Logic High ...
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... Maximum Junction Temperature (T MAX +150 C J Storage Temperature . . . . . . . . . . . . . . . . . . . – +150 C Lead Temperature (Soldering, 10 sec +300 C Package Power Dissipation . . . . . . . . . . . . . (T Thermal Resistance JA, SOIC (SO-16 C/W P-DIP (N-16 C/W AD8801 PIN DESCRIPTIONS Pin Name Description 1 V Common DAC Reference Input REFH 2 O1 DAC Output #1, Addr = 000 3 O2 ...
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... The fast serial-data loading of 33 MHz makes it possible to load all eight DACs in as little time (12 The exact timing requirements are shown in Figure 2. The AD8801 offers a midscale preset activated by the RS pin simplifying initial setting conditions at first power up. The AD8803 has both a V dent positive full-scale and zero-scale settings to optimize reso- lution ...
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... REFH REFL The reference input pins set the output voltage range of all eight DACs. In the case of the AD8801 only the V able to establish a user designed full-scale output voltage. The external reference voltage can be any value between 0 and V but must not exceed the V supply voltage ...
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... AD8801/AD8803–Typical Performance Characteristics + +5V 0.75 REFH REFL 0.5 0.25 0 –0.25 –0.5 –0.75 – 128 CODE – Decimal Figure 7. INL vs. Code + +5V REFH T = –40 C, + REFL 0.5 0.25 0 –0.25 –0.5 –0.75 – 128 CODE – Decimal Figure 8 ...
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... DD 3 3.5 4 4.5 5 Figure 16. Adjacent Channel Clock Feedthrough 10k 100k +2V REF 0.005 –0.005 –0.01 Figure 18. Zero-Scale Error Accelerated by Burn-In –7– AD8801/AD8803 OUTPUT1 +5V DD 100 V = +2V REF 500kHz 10 0% TIME – 0.2µs/DIV OUTPUT1 ...
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... AD8801/AD8803 Buffering the AD8801/AD8803 Output In many cases, the nominal 5 k output impedance of the AD8801/AD8803 is sufficient to drive succeeding circuitry lower output impedance is required, an external amplifier can be added. Several examples are shown in Figure 23. One ampli- fier of an OP291 is used as a simple buffer to reduce the output resistance of DAC A ...
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... RS-232 communications interface), the AD8801/AD8803 can easily be addressed in software. Eleven data bits are required to load a value into the AD8801/ SUMMER CIRCUIT AD8803 (3 bits for the DAC address and 8 bits for the DAC WITH FINE TRIM value) ...
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... CLR SETB RET ; BYTESWAP: MOV SWAP_LOOP: MOV RLC MOV MOV RRC MOV DJNZ RET END Listing 1. Software for the 8051 to AD8801/AD8803 Serial Port Interface 90H 40H 41H 042H 043H 44H 100H SCON.7 SCON.6 SCON.5 SCON.1 PORT1.1,#00001110B PORT1.1 SHIFT1,DAC_ADDR BYTESWAP SBUF,SHIFT2 SCON ...
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... MSB of the second byte with a Rotate Right Carry instruction. After 8 loops, SHIFT2 contains the data in the proper format. ; This 8051 C subroutine loads an AD8801 or AD8803 DAC with an 8-bit value, ; using the 8051’s parallel port #1. ; The DAC value is stored at location DAC_VALUE ...
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... SCK. This mode matches the requirements of the AD8801/AD8803. After the registers are saved on the stack, the DAC value and address are transferred to RAM and the AD8801/AD8803’ driven low. Next, the DAC’s ad- dress byte is transferred to the SPDR register, which automati- cally initiates the SPI data transfer ...
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... SPI data register; Read-Buffer; Write-Shifter SDI1 is encoded from 0 (Hex (Hex) SDI2 is encoded from 00 (Hex (Hex) AD8801/3 requires two 8-bit loads; upper 5 bits of SDI1 are ignored. AD8801/3 address bits in last three LSBs of SDI1. SDI packed byte 1 “0,0,0,0;0,A2,A1,A0” SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0” ...
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... STAA SDI1 * * Enter Contents of SDI2 Data Register * LDAA $0001 STAA SDI2 * LDX #SDI1 LDY #$1000 * * Reset AD8801 to one-half scale (AD8803 does not have a Reset input) * BCLR PORTC,Y $02 BSET PORTC,Y $ Get AD8801/03 ready for data input * BCLR PORTD,Y $20 * TFRLP LDAA 0,X STAA ...
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... PLANE 0.014 (0.356) (2.54) BSC 16-Pin Narrow Body SOIC Package (R-16A 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20 0.2284 (5.80) 0.3937 (10.00) 0.3859 (9.80) 0.0688 (1.75) 0.0532 (1.35 0.0500 0.0192 (0.49) 0.0099 (0.25) (1.27) 0.0138 (0.35) 0.0075 (0.19) BSC –15– AD8801/AD8803 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.0196 (0.50 0.0099 (0.25) 0.0500 (1.27) 0.0160 (0.41) ...
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