UPD75P3018AGK-BE9 Renesas Electronics Corporation., UPD75P3018AGK-BE9 Datasheet
UPD75P3018AGK-BE9
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UPD75P3018AGK-BE9 Summary of contents
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SINGLE-CHIP MICROCONTROLLER DESCRIPTION The µ PD75P3018A replaces the µ PD753017A’s internal mask ROM with a one-time PROM, and features expanded ROM capacity. The µ PD75P3018A inherits the function of the µ PD75P3018, and enables high-speed operation at a low ...
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FUNCTION OUTLINE Item Instruction execution time Internal memory PROM RAM General-purpose register Input/output port CMOS input CMOS input/output CMOS output N-ch open-drain input/output 8 Total LCD controller/driver Timer Serial interface Bit sequential buffer (BSB) Clock output (PCL) Buzzer output (BUZ) ...
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PIN CONFIGURATION (Top View) ................................................................................................ 2. BLOCK DIAGRAM ........................................................................................................................... 3. PIN FUNCTIONS .............................................................................................................................. 3.1 Port Pins ................................................................................................................................................... 3.2 Non-port Pins ........................................................................................................................................... 3.3 Pin Input/Output Circuits ......................................................................................................................... 10 3.4 Recommended Connection for Unused Pins ........................................................................................ 12 4. SWITCHING FUNCTION BETWEEN ...
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PIN CONFIGURATION (Top View) • 80-pin plastic QFP (14 × 14 mm) µ PD75P3018AGC-3B9, 75P3018AGC-3B9-A, 75P3018AGC-8BT, 75P3018AGC-8BT-A • 80-pin plastic TQFP (fine pitch) (12 × 12 mm) µ PD75P3018AGK-BE9, 75P3018AGK-9EU, 75P3018AGK-9EU ...
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BLOCK DIAGRAM TIMER/EVENT PTO1/P21 COUNTER #1 PROGRAM TI1/TI2/ INTT1 COUNTER P12/INT2 TIMER/EVENT COUNTER PTO2/P22/PCL #2 INTT2 TOUT0 BASIC INTERVAL TIMER/ WATCHDOG TIMER INTBT TI0/P13 TIMER/EVENT COUNTER PTO0/P20 #0 PROGRAM MEMORY INTT0 TOUT0 32768 x 8 BITS WATCH BUZ/P23 TIMER ...
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PIN FUNCTIONS 3.1 Port Pins (1/2) Pin Name I/O Alternate Function P00 Input INT4 P01 SCK P02 SO/SB0 P03 SI/SB1 P10 Input INT0 P11 INT1 P12 TI1/TI2/INT2 P13 TI0 P20 I/O PTO0 P21 PTO1 P22 PCL/PTO2 P23 BUZ P30 ...
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Port Pins (2/2) Pin Name I/O Alternate Function P60 I/O KR0 P61 KR1 P62 KR2 P63 KR3 P70 I/O KR4 P71 KR5 P72 KR6 P73 KR7 BP0 Output S24 BP1 S25 BP2 S26 BP3 S27 BP4 Output S28 BP5 ...
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Non-port Pins (1/2) Pin Name I/O Alternate Function TI0 Input P13 TI1, TI2 P12/INT2 PTO0 Output P20 PTO1 P21 PTO2 P22 PCL P22 BUZ P23 SCK I/O P01 SO/SB0 P02 SI/SB1 P03 INT4 Input P00 INT0 Input P10 INT1 ...
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Non-port Pins (2/2) Pin Name I/O Alternate Function S0-S23 Output — S24-S31 Output BP0-BP7 COM0-COM3 Output — — — LC0- LC2 BIAS Output — Note 2 LCDCL I/O P30/MD0 SYNC Note 2 I/O P31/MD1 Notes 1. The ...
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Pin Input/Output Circuits The input/output circuits for the µ PD75P3018A’s pins are shown in abbreviated form below. TYPE P-ch IN N-ch CMOS standard input buffer TYPE B IN Schmitt trigger input with hysteresis characteristics. TYPE B-C ...
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TYPE F-B P.U.R. enable Output V DD disable (P) P-ch Data Output N-ch disable Output disable (N) P.U.R. : Pull-Up Resistor TYPE G-A V LC0 V LC1 P-ch N-ch SEG N-ch data V LC2 N-ch TYPE G-B V LC0 V ...
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Recommended Connection for Unused Pins Pin P00/INT4 P01/SCK P02/SO/SB0 P03/SI/SB1 P10/INT0, P11/INT1 P12/TI1/TI2/INT2 P13/TI0 P20/PTO0 P21/PTO1 P22/PTO2/PCL P23/BUZ P30/LCDCL/MD0 P31/SYNC/MD1 P32/MD2, P33/MD3 P40/D0-P43/D3 P50/D4-P53/D7 P60/KR0-P63/KR3 P70/KR4-P73/KR7 S0-S23 S24/BP0-S31/BP7 COM0-COM3 V -V LC0 LC2 BIAS XT1 Note Note XT2 Note ...
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SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE Setting a stack bank selection (SBS) register for the µ PD75P3018A enables the program memory to be switched between Mk I mode and Mk II mode. This function is ...
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Setting of Stack Bank Selection Register (SBS) Use the stack bank selection register to switch between Mk I mode and Mk II mode. Figure 4-1 shows the format for doing this. The stack bank selection register is set using ...
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DIFFERENCES BETWEEN µ PD75P3018A AND µ PD753012A, 753016A, AND 753017A The µ PD75P3018A replaces the internal mask ROM in the µ PD753012A, 753016A, and 753017A with a one-time PROM and features expanded ROM capacity. The µ PD75P3018A’ ...
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MEMORY CONFIGURATION 6.1 Program Counter (PC) ... 15 bits This is a 15-bit binary counter that stores program memory address data. Bit 15 is valid during Mk II mode. But PC14 is fixed at zero during Mk I mode, ...
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Figure 6-2. Program Memory Map (Mk I mode 0000H MBE RBE Internal reset start address (high-order 6 bits) Internal reset start address (low-order 8 bits) 0002H MBE RBE INTBT/INT4 start address (high-order 6 bits) INTBT/INT4 start address ...
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Figure 6-3. Program Memory Map (Mk II mode 0000H MBE RBE Internal reset start address (high-order 6 bits) Internal reset start address (low-order 8 bits) 0002H MBE RBE INTBT/INT4 start address (high-order 6 bits) INTBT/INT4 start address ...
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Data Memory (RAM) ... 1024 × 4 bits Figure 6-4 shows the data memory configuration. Data memory consists of a data area and a peripheral hardware area. The data area consists of 1024 × 4-bit static RAM. General-purpose register ...
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INSTRUCTION SET (1) Representation and coding formats for operands In the instruction’s operand area, use the following coding format to describe operands corresponding to the instruction’s operand representations (for further description, see the RA75X Assembler Package User’s Manual Language ...
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Operation legend register; 4-bit accumulator register register register register register register register XA : Register ...
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Description of symbols used in addressing area MB = MBE • MBS *1 MBS = 0- MBE = (000H-07FH (F80H-FFFH) MBE = ...
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Description of machine cycles S indicates the number of machine cycles required for skipping of skip-specified instructions. The value of S varies as shown below. • No skip ..................................................................... • Skipped instruction is 1-byte or 2-byte ...
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Instruction Mnemonic Operand Group Transfer MOV A, #n4 reg1, #n4 XA, #n8 HL, #n8 rp2, #n8 A, @HL A, @HL+ A, @HL– A, @rpa1 XA, @HL @HL, A @HL mem XA, mem mem, A mem reg ...
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Instruction Mnemonic Operand Group Bit transfer MOV1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit fmem.bit, CY pmem.@L, CY @H+mem.bit, CY Arithmetic ADDS A, #n4 XA, #n8 A, @HL XA, rp’ rp’1, XA ADDC A, @HL XA, rp’ rp’1, XA SUBS A, ...
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Instruction Mnemonic Operand Group Comparison SKE reg, #n4 @HL, #n4 A, @HL XA, @HL A, reg XA, rp’ Carry flag SET1 CY manipulation CLR1 CY SKT CY NOT1 CY Memory bit SET1 mem.bit manipulation fmem.bit pmem.@L @H+mem.bit CLR1 mem.bit fmem.bit ...
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Instruction Mnemonic Operand Group Branch BR Note 1 addr addr1 !addr $addr $addr1 PCDE PCXA BCDE BCXA Note 1 BRA !addr BRCB Note 1 !caddr Notes 1. Shaded areas indicate support for Mk II mode only. Other areas indicate support ...
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Instruction Mnemonic Operand Group Subroutine CALLA Note !addr1 stack control CALL Note !addr CALLF Note !faddr RET Note RETS Note Note RETI Note Shaded areas indicate support for Mk II mode only. Other areas indicate support for Mk I mode ...
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Instruction Mnemonic Operand Group Subroutine PUSH rp stack control BS POP rp BS Interrupt EI control IEXXX DI IEXXX I/O IN Note 1 A, PORTn XA, PORTn Note 1 OUT PORTn, A PORTn, XA CPU control HALT STOP NOP Special ...
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ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory contained in the µ PD75P3018A is a 32768 × 8-bit one-time PROM that can be electrically written one time only. The pins listed in the table below are used ...
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Program Memory Write Procedure Program memory can be written at high speed using the following procedure. (1) Pull unused pins to Vss through resistors. Set the X1 pin low. (2) Supply the V and V pins. ...
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Program Memory Read Procedure The µ PD75P3018A can read program memory contents using the following procedure. (1) Pull unused pins to Vss through resistors. Set the X1 pin low. (2) Supply the V and V pins. ...
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One-time PROM Screening Due to its structure, the one-time PROM cannot be fully tested before shipment by NEC Electronics. Therefore, NEC Electronics recommends that after the required data is written and the PROM is stored under the temperature and ...
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ELECTRICAL SPECIFICATIONS ° Absolute Maximum Ratings ( Parameter Symbol Supply voltage V DD PROM supply voltage V PP Input voltage V Other than ports 4 and Ports 4 and 5 (During N-ch ...
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Main System Clock Oscillator Characteristics (T Resonator Recommended Circuit Ceramic Oscillation frequency resonator ( Oscillation C1 C2 stabilization time V DD Crystal Oscillation frequency resonator ( Oscillation C1 C2 stabilization time V DD External X1 input ...
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Subsystem Clock Oscillator Characteristics (T Resonator Recommended Circuit Crystal Oscillation frequency resonator (f XT1 XT2 R Oscillation C3 C4 stabilization time V DD External XT1 input frequency clock (f XT1 XT2 XT1 input high-/ low-level width (t Notes 1. The ...
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DC Characteristics (T = – Parameter Symbol Low-level output I Per pin OL current Total of all pins High-level input V Ports 2, 3 IH1 voltage V Ports RESET IH2 ...
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DC Characteristics (T = – Parameter Symbol LCD drive voltage V VAC0 = 0 T LCD T VAC0 = 1 = 2.0 V ±10% VAC current Note 1 I VAC0 = 1, V VAC ...
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AC Characteristics (T = – Parameter Symbol CPU clock cycle time Note 1 t Operation with CY (minimum instruction execution main system clock time = 1 machine cycle) Operation with subsystem clock TI0, TI1, ...
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Serial transfer operation 2-wire and 3-wire serial I/O modes (SCK ... internal clock output): (T Parameter Symbol SCK cycle time 2.7 to 5.5 V KCY1 DD SCK high-/low-level width 2.7 to 5.5 ...
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SBI mode (SCK ... internal clock output (master)): (T Parameter Symbol SCK cycle time 2.7 to 5.5 V KCY3 DD SCK high-/low-level width 2.7 to 5.5 V KL3 KH3 DD SB0, 1 ...
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AC Timing Test Points (except X1 and XT1 inputs Clock Timing X1 input XT1 input TI0, TI1, TI2 Timing TI0, TI1, TI2 42 (MIN (MAX (MIN (MAX.) V ...
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Serial Transfer Timing 3-wire Serial I/O Mode SCK SI SO 2-wire Serial I/O Mode SCK SB0 KCY1 KL1,2 KH1 SIK1,2 KSI1,2 Input data t KSO1,2 Output data t KCY1 KL1,2 KH1,2 ...
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Serial Transfer Timing Bus Release Signal Transfer SCK t t KSB SBL SB0, 1 Command Signal Transfer SCK t KSB SB0, 1 Interrupt Input Timing INT0 KR0-7 RESET Input Timing RESET 44 t KCY3 ...
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Data retention characteristics of data memory in STOP mode and at low supply voltage (T Parameter Symbol Data retention power V DDDR supply voltage Release signal setup time t SREL Oscillation stabilization t Released by RESET WAIT wait time Note ...
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DC Programming Characteristics ( Parameter Symbol High-level input voltage V Pins other than X1, X2 IH1 V X1, X2 IH2 Low-level input voltage V Pins other than X1, X2 IL1 V X1, X2 IL2 Input leakage current ...
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Program Memory Write Timing t VPS VDS D0/P40-D3/P43 Data Input D4/P50-D7/P53 MD0/P30 t PW MD1/P31 PCR ...
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PACKAGE DRAWINGS 80-PIN PLASTIC QFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PLASTIC QFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PIN PLASTIC TQFP (FINE PITCH) (12x12 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PLASTIC TQFP (FINE PITCH) (12x12 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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RECOMMENDED SOLDERING CONDITIONS The µ PD75P3018A should be soldered and mounted under the following recommended conditions. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Table 11-1. Surface Mounting Type Soldering Conditions (1/3) (1) µ PD75P3018AGC-3B9: ...
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Table 11-1. Surface Mounting Type Soldering Conditions (2/3) (3) µ PD75P3018AGK-BE9: 80-pin plastic TQFP (fine pitch) (12 × 12 mm, resin thickness 1.05 mm) Soldering Method Infrared reflow Package peak temperature: 235˚C, Time: 30 seconds max. (at 210˚C or higher), ...
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Table 11-1. Surface Mounting Type Soldering Conditions (3/3) (5) µ PD75P3018AGC-3B9-A: 80-pin plastic QFP (14 × 14 mm, resin thickness 2.7 mm) µ PD75P3018AGC-8BT-A: 80-pin plastic QFP (14 × 14 mm, resin thickness 1.4 mm) Soldering Method Infrared reflow Package ...
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APPENDIX A. µ PD75316B, 753017A AND 75P3018A FUNCTION LIST Parameter Program memory 000H-3FFH (1024 × 4 bits) Data memory CPU 75X Standard 0.95, 1.91, or 15.3 µ s Instruction When main system execution time clock is selected (at 4.19 MHz ...
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Parameter Φ, 524, 262, 65.5 kHz Clock output (PCL) (Main system clock: BUZ output (BUZ) 2 kHz (Main system clock: Serial interface 3 modes are available • 3-wire serial I/O mode ... MSB/LSB can be selected for transfer first bit ...
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APPENDIX B. DEVELOPMENT TOOLS The following development tools have been provided for system development using the µ PD75P3018A. In the 75XL Series, the relocatable assembler common to series is used in combination with the device file of each type. RA75X ...
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PROM Write Tools Hardware PG-1500 This is a PROM programmer that can program single-chip microcontroller with PROM in stand alone mode or under control of host machine when connected with supplied accessory board and optional programmer adapter. It can also ...
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Debugging Tools In-circuit emulators (IE-75000-R and IE-75001-R) are provided as program debugging tools for the µ PD75P3018A. Various system configurations using these in-circuit emulators are listed below. Hardware IE-75000-R Note 1 The IE-75000 in-circuit emulator to be used ...
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OS for IBM PCs The following operating systems for the IBM PC are supported. PC DOS MS-DOS IBM DOS Caution Ver. 5.0 or later includes a task swapping function, but this software is not able to use that function. 60 ...
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APPENDIX C. RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Device Related Documents Document Name µ PD753012A, 753016A, 753017A Data Sheet µ PD75P3018A Data Sheet µ PD753017 ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and ...
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MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/ or other countries. IBM DOS, PC/AT, and PC DOS are trademarks of International Business Machines Corporation. These commodities, technology or software, must be ...