W78C32CF-24 Winbond, W78C32CF-24 Datasheet
W78C32CF-24
Related parts for W78C32CF-24
W78C32CF-24 Summary of contents
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... Four 8-bit bidirectional ports Three 16-bit timer/counters One full duplex serial port Boolean processor Six-source, two-level interrupt capability Built-in power management Packages: DIP 40: W78C32C-24/40 PLCC 44: W78C32CP-24/40 QFP 44: W78C32CF-24/40 8-BIT MICROCONTROLLER Publication Release Date: July 1999 - 1 - W78C32C Revision A2 ...
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... ALE 12 29 INT0, P3.2 PSEN 13 28 P2.7, A15 INT1, P3.3 T0, P3 P2.6, A14 T1, P3 P2.5, A13 16 WR, P3.6 25 P2.4, A12 17 24 P2.3, A11 RD, P3 P2.2, A10 XTAL2 XTAL1 19 22 P2. P2.0, A8 Vss 44-Pin QFP (W78C32CF P1.5 P0.4, AD4 39 38 P1.6 P0 ...
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PIN DESCRIPTION P0.0 P0.7 Port 0, Bits 0 through 7. Port bidirectional I/O port. This port also provides a multiplexed low order address/data bus during accesses to external memory. P1.0 P1.7 Port 1, Bits 0 through 7. ...
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PSEN Program Store Enable Output, active low. PSEN enables the external ROM onto the Port 0 address/data bus during fetch and MOVC operations. PSEN goes to a high state during reset with a weak pull-up. XTAL1 Crystal 1. This is ...
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FUNCTIONAL DESCRIPTION The W78C32C architecture consists of a core controller surrounded by various registers, four general purpose I/O ports, 256 bytes of RAM, three timer/counters, and a serial port. The processor supports 111 different instruction and references both a 64K ...
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Reset The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two machine cycles while the oscillator is running. An internal trigger circuit in the reset line is used to deglitch ...
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DC Characteristics, continued PARAMETER Output High Voltage P1, P3 Output High Voltage (*1) (*1) ALE, PSEN , Input Low Voltage P1, P3 Input Low Voltage (*3) XTAL1, RST Input High Voltage P1, P3 Input High Voltage (*3) ...
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Program Fetch Cycle PARAMETER Address Valid to ALE Low Address Hold after ALE Low ALE Low to PSEN Low PSEN Low to Data Valid Data Hold after PSEN High Data Float after PSEN High ALE Pulse Width PSEN Pulse Width ...
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Port Access Cycle PARAMETER Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output to ALE Note: Ports are read during S5P2, and output data becomes available at the end of S6P2. The timing data are ...
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Timing Waveforms, continued Data Write Cycle S4 XTAL1 ALE PSEN PORT 2 PORT 0 A0-A7 WR Port Access Cycle XTAL1 ALE T PDS PORT INPUT SAMPLE A8-A15 DATA OUT T DAD T T DAW ...
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TYPICAL APPLICATION CIRCUIT Using External Program Memory and Crystal XTAL1 XTAL2 CRYSTAL 8 RST C1 C2 INT0 12 13 INT1 P1.0 P1.1 2 P1.2 ...
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Expanded External Data Memory and Oscillator XTAL1 OSCILLATOR XTAL2 8 RST INT0 12 13 INT1 P1.0 2 P1.1 3 P1.2 4 P1.3 5 P1.4 6 ...
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PACKAGE DIMENSIONS 40-pin DIP 44-pin PLCC Seating Plane ...
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... Dimension b does not include dambar protrusion/intrusion. 3. Controlling dimension: Millimeter 4. General appearance spec. should be based on final visual inspection spec. Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 ...