SL1461SA Zarlink Semiconductor, SL1461SA Datasheet
SL1461SA
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SL1461SA Summary of contents
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... The SL1461SA is a wideband PLL FM demodulator, intended primarily for application in satellite tuners. The device contains all elements necessary, with the exception of external oscillator sustaining network and loop feedback components, to form a complete PLL system operating at frequencies up to 800MHz. An AFC with window adjust is provided, whose output signal can be used to correct for any frequency drift at the head end local oscillator ...
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SP1461SA Advance Information ELECTRICAL CHARACTERISTICS T = -20°C to +80° +4.5V to +5.5V. The electrical characteristics are guaranteed by either production test or design. amb CC They apply within the specified ambient temperature and supply voltage unless otherwise ...
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... RF CARRIER FREQ 479.5MHz FM MODULATION 13.5MHz P–P PRE–EMPHASISED VIDEO SL1461 TEST APPLICATION BOARD MONTFORD See Fig. 3 for details TEST OVEN PRE EMPHASISED BASE BAND VIDEO VIDEO AMPLIFIER/ DE EMPHASISED NETWORK VIDEO ANALYSER ROHDE & SCHWARZ UAF Fig.2 SL1461SA block diagram Min. Typ. Max. -0 2.5 Vp-p -0.3 V +0.3 ...
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... RF level detect circuit, which generates an AGC signal that can be used for controlling the gain of the IF amplifier stages, so maintaining a fixed level to the RF input of the SL1461SA, for optimum threshold performance. The bias point of the AGC circuit can be adjusted to cater for variation in AGC line voltage requirement and device input power ...
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... DESIGN OF PLL LOOP PARAMETERS GAIN = K RF INPUT VCO The SL1461SA is normally used as a type 1 second order loop and can be represented by the above diagram. For such a system the following parameters apply and AFC FACILITY The SL1461SA contains an analog frequency error detect circuit, which generates DC voltage proportional to the integral of frequency error ...
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SP1461SA Advance Information WINDOW ADJUST FREQ BASEBAND VIDEO ALIGN – + – Fig.5 AFC system block diagram EXT C EXT V AFC ...
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... REF; 2.7V AGC OUTPUT AGC output V REF; 3V 2x1500 RF INPUTS RF inputs V CC AFC PUMP 10K AFC OUTPUT AFC output stage Fig.6 SL1461SA I/O port internal circuitry SL1461SA Advance Information AGC BIAS V REF; 2V AGC bias adjust AFC WINDOW V REF; 1.6V AFC window adjust 330 330 2mA ...
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... FREQ MHz 520 500 480 460 440 420 400 360 Fig.7 Typical VCO frequency vs DC control voltage 8 V REF; 1. OSCILLATOR + OSCILLATOR – Local oscillator Fig.6a SL1461SA I/O port internal circuitry 1 1.5 2 2 VOLTAGE VIDEO OUTPUT 105 4mA Video output drive 4 ...
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... OUTPUT 1.0 VOLTAGE 0.5 –70 Fig.9 SL1461SA AGC output voltage for differing values of AGC bias resistor APPLICATION NOTES Capture range Under conditions when there input signal present, the SL1461SA may react to spurious radiation from the free running oscillator coupling into the RF inputs. ...
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... S-curve. When the oscillator is sitting in the centre of the S-curve, the two video outputs will be at the same DC voltage. RF oscillator design The standard application circuit for the SL1461SA is shown in Fig.3 The layout of the VCO tank should follow normal good RF techniques - ie as compact as possible. This will minimise parasitics, thus giving improved VCO linearity and stability ...
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... Advance Information Fig.10 Layout of demo board with component locations SL1461SA 11 ...
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... Fax: +65 333 6192 Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...