M38002E2FP Renesas Electronics Corporation., M38002E2FP Datasheet
M38002E2FP
Related parts for M38002E2FP
M38002E2FP Summary of contents
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To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April ...
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MITSUBISHI 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES 3800 Group User’s Manual ...
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Keep safety first in your circuit designs! Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to ...
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Preface This user’s manual describes Mitsubishi’s CMOS 8- bit microcomputers 3800 Group. After reading this manual, the user should have a through knowledge of the functions and features of the 3800 Group, and should be able to fully utilize the ...
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BEFORE USING THIS USER’S MANUAL This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions, such as hardware design or software development. Chapter 3 also includes necessary information for systems development. Be sure ...
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LIST OF GROUPS HAVING THE SIMILAR FUNCTIONS 3800 group, one of the CMOS 8-bit microcomputer 38000 series presented in this user’s manual is provided with standard functions. The basic functions of the 3800, 3802, 3806 and 3807 groups having the ...
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CHAPTER 1. HARDWARE DESCRIPTION ................................................................................................................................ 1-2 FEATURES ...................................................................................................................................... 1-2 APPLICATIONS .............................................................................................................................. 1-2 PIN CONFIGURATION .................................................................................................................. 1-2 FUNCTIONAL BLOCK ................................................................................................................... 1-4 PIN DESCRIPTION ........................................................................................................................ 1-5 PART NUMBERING ....................................................................................................................... 1-6 GROUP EXPANSION .................................................................................................................... 1-7 GROUP EXPANSION (EXTENDED OPERATING TEMPERATURE VERSION) ................... 1-9 ...
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Table of contents CHAPTER 2. APPLICATION 2.1 I/O port ..................................................................................................................................... 2-2 2.1.1 Memory map of I/O port ............................................................................................... 2-2 2.1.2 Related registers ............................................................................................................ 2-3 2.1.3 Handling of unused pins ............................................................................................... 2-4 2.2 Timer ......................................................................................................................................... 2-5 2.2.1 Memory map of timer ...
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Notes on memory expansion mode and microprocessor mode ............................ 3-21 3.3.6 Notes on built-in PROM .............................................................................................. 3-22 3.4 Countermeasures against noise ...................................................................................... 3-24 3.4.1 Shortest wiring length .................................................................................................. 3-24 3.4.2 Connection of a bypass capacitor across the Vss line ...
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CHAPTER 1 HARDWARE Fig. 1 Pin configuration of M38002M4-XXXFP/M38003M6-XXXHP ....................................... 1-2 Fig. 2 Pin configuration of M38002M4-XXXSP ......................................................................... 1-3 Fig. 3 Functional block diagram .................................................................................................. 1-4 Fig. 4 Part numbering ................................................................................................................... 1-6 Fig. 5 Memory expansion plan .................................................................................................... 1-7 Fig. ...
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List of figures Fig. 2.2.7 Structure of Interrupt request register 2 ................................................................... 2-9 Fig. 2.2.8 Structure of Interrupt control register 1 .................................................................. 2-10 Fig. 2.2.9 Structure of Interrupt control register 2 .................................................................. 2-10 Fig. 2.2.10 Connection of timers and setting ...
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Fig. 2.3.31 Setting of related registers at a transmitting side [Communication using UART] ........................ 2-45 Fig. 2.3.32 Setting of related registers at a receiving side [Communication using UART] ............................ 2-46 Fig. 2.3.33 Control procedure at a transmitting side [Communication using ...
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List of figures CHAPTER 3 APPENDIX Fig. 3.1.1 Circuit for measuring output switching characteristics ......................................... 3-11 Fig. 3.1.2 Timing diagram (in single-chip mode) .................................................................... 3-12 Fig. 3.1.3 Timing diagram (in memory expansion mode and microprocessor mode) (1) 3-13 Fig. 3.1.4 ...
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CHAPTER 1 HARDWARE Table 1 Pin description ................................................................................................................. 1-5 Table 2 List of supported products ............................................................................................. 1-8 Table 3 List of supported products (Extended operating temperature version) .................. 1-9 Table 4 Push and pop instructions of accumulator or processor status ...
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List of tables Table 3.3.1 Programming adapter ............................................................................................. 3-22 Table 3.3.2 Setting of programming adapter switch ............................................................... 3-22 Table 3.3.3 Setting of PROM programmer address ................................................................ 3-23 Table 3.5.1 Function of CNTR ii /CNTR edge switch bit ........................................................ 3-33 0 ...
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HARDWARE DESCRIPTION FEATURES APPLICATIONS PIN CONFIGURATION FUNCTIONAL BLOCK PIN DESCRIPTION PART NUMBERING GROUP EXPANSION FUNCTIONAL DESCRIPTION NOTES ON PROGRAMMING DATA REQUIRED FOR MASK ORDERS ...
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HARDWARE DESCRIPTION/FEATURES/APPLICATIONS/PIN CONFIGURATION DESCRIPTION The 3800 group is the 8-bit microcomputer based on the 740 fam- ily core technology. The 3800 group is designed for office automation equipment, household appliances and include four timers, serial I/O function. The various microcomputers ...
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PIN CONFIGURATION (TOP VIEW) Fig. 2 Pin configuration of M38002M4-XXXSP ...
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HARDWARE FUNCTIONAL BLOCK FUNCTIONAL BLOCK Fig. 3 Functional block diagram 1-4 3800 GROUP USER’S MANUAL ...
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PIN DESCRIPTION Table 1. Pin description Pin Name V Power source • Apply voltage (Extended operating temperature version : 4 5 CNV CNV • This pin ...
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HARDWARE PART NUMBERING PART NUMBERING Product M3800 XXX SP Fig. 4 Part numbering 1-6 Package type SP : 64P4B package FP : 64P6N-A package HP : 64P6D-A package SS : 64S1B package FS : 64D0 package ...
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GROUP EXPANSION Mitsubishi plans to expand the 3800 group as follows: ( ...
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... GROUP EXPANSION Currently supported products are listed below. Table 2. List of supported products (P) ROM size (bytes) Product ROM size for User in ( M38002M2-XXXSP M38002E2-XXXSP M38002E2SP 8192 (8062) M38002M2-XXXFP M38002E2-XXXFP M38002E2FP M38002M4-XXXSP M38002E4-XXXSP M38002E4SP M38002E4SS 16384 (16254) M38002M4-XXXFP M38002E4-XXXFP M38002E4FP M38002E4FS M38003M6-XXXSP 24576 M38003M6-XXXFP ...
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GROUP EXPANSION (EXTENDED OPERATING TEMPERATURE VERSION) Mitsubishi plans to expand the 3800 group (extended operating temperature version) as follows: (1) Support for mask ROM, One Time PROM, and EPROM versions ROM/PROM capacity ................................... bytes RAM ...
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HARDWARE FUNCTIONAL DESCRIPTION FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The 3800 group uses the standard 740 family instruction set. Re- fer to the table of 740 family addressing modes and machine in- structions or the SERIES 740 <Software> User’s Manual ...
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M(S) (PC (S) (S – 1) Store Return Address on Stack (Note 2) M(S) (PC (S) (S – 1) Subroutine Execute RTS ( Restore Return Address (PC ) M( (PC ) M(S) ...
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HARDWARE FUNCTIONAL DESCRIPTION Processor status register (PS) The processor status register is an 8-bit register consisting of flags which indicate the status of the processor after an arithmetic op- eration. Branch operations can be performed by testing the Carry (C) ...
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CPU mode register The CPU mode register is allocated at address 003B The CPU mode register contains the stack page selection bit CPU mode register ( CPUM : address Processor mode bits Stack page selection bit Not used ...
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HARDWARE FUNCTIONAL DESCRIPTION Memory Special function register (SFR) area The Special Function Register area in the zero page contains con- trol registers such as I/O ports and timers. RAM RAM is used for data storage and for stack area of ...
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Port P0 (P0) 0000 16 Port P0 direction register (P0D) 0001 16 Port P1 (P1) 0002 16 Port P1 direction register (P1D) 0003 16 Port P2 (P2) 0004 16 Port P2 direction register (P2D) 0005 16 Port P3 (P3) 0006 ...
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HARDWARE FUNCTIONAL DESCRIPTION I/O Ports Direction registers The 3800 group has 58 programmable I/O pins arranged in eight I/O ports (ports P0 to P7). The I/O ports have direction registers which determine the input/output direction of each individual pin. Each ...
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Ports P0, P1, P2, P3 Direction register Port latch Data bus (3) Port P4 4 Serial I/O enable bit Receive enable bit Direction register Port latch Data bus Serial I/O input (5) Port P4 6 ...
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HARDWARE FUNCTIONAL DESCRIPTION Interrupts Interrupts occur by fifteen sources: eight external, six internal, and one software. Interrupt control Each interrupt is controlled by an interrupt request bit, an interrupt enable bit, and the interrupt disable flag except for the software ...
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Interrupt request bit Interrupt enable bit Interrupt disable flag (I) Fig. 13 Interrupt control b7 b0 Interrupt edge selection register (INTEDGE : address 003A INT active edge selection bit 0 INT active edge selection bit 1 INT active edge selection ...
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HARDWARE FUNCTIONAL DESCRIPTION Timers The 3800 group has four timers: timer X, timer Y, timer 1, and timer 2. All timers are count down. When the timer reaches “00 derflow occurs at the next count pulse and the corresponding timer ...
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Oscillator Divider f(X ) 1/16 IN Pulse width measurement mode CNTR active 0 P5 /CNTR pin 4 0 Event edge switch bit counter mode “0” “1” CNTR active 0 edge switch bit Port P5 4 Port P5 4 latch direction ...
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HARDWARE FUNCTIONAL DESCRIPTION Serial I/O Serial I/O can be used as either clock synchronous or asynchro- nous (UART) serial I/O. A dedicated timer is also provided for baud rate generation CLK1 BRG ...
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Asynchronous serial I/O (UART) mode Clock asynchronous serial I/O mode (UART) can be selected by clearing the serial I/O mode selection bit of the serial I/O control register to “0”. Eight serial data transfer formats can be selected, and the ...
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HARDWARE FUNCTIONAL DESCRIPTION Transmit or receive clock Transmit buffer write signal TBE=0 TSC=0 TBE=1 Serial output Receive buffer read signal ST Serial input Notes 1: Error flag detection occurs at the same time ...
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Serial I/O status register (SIOSTS : address 0019 16 Transmit buffer empty flag (TBE) 0: Buffer full 1: Buffer empty Receive buffer full flag (RBF) 0: Buffer empty 1: Buffer full Transmit shift completion flag (TSC) 0: Transmit ...
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HARDWARE FUNCTIONAL DESCRIPTION Reset Circuit To reset the microcomputer, the RESET pin should be held at an “L” level for more. Then the RESET pin is returned to an “H” level (the power source voltage should be ...
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X IN RESET RESET OUT (internal reset) SYNC Address Data clock cycles IN Fig. 24 Timing of reset ? ? ? ? ? ? ? ? ? ? ? ? Notes 1: f(X ) and ...
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HARDWARE FUNCTIONAL DESCRIPTION Clock Generating Circuit An oscillation circuit can be formed by connecting a resonator be- tween X and supply a clock signal externally, input OUT the X pin and make the X ...
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Processor Modes Single-chip mode, memory expansion mode, and microprocessor mode can be selected by changing the contents of the processor mode bits CM and CM (bits 0 and 1 of address 003B 0 1 memory expansion mode and microprocessor mode, ...
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HARDWARE FUNCTIONAL DESCRIPTION Bus control with memory expansion The 3800 group has a built-in ONW function to facilitate access to external memory and I/O devices in memory expansion mode or microprocessor mode “L” level signal is input to ...
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NOTES ON PROGRAMMING Processor Status Register The contents of the processor status register (PS) after a reset are undefined, except for the interrupt disable flag (I) which is “1”. Af- ter a reset, initialize flags which affect program execution. In ...
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HARDWARE DATA REQUIRED FOR MASK ORDERS/ROM PROGRAMMING METHOD DATA REQUIRED FOR MASK ORDERS The following are necessary when ordering a mask ROM produc- tion: 1. Mask ROM Order Confirmation Form 2. Mark Specification Form 3. Data to be written to ...
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FUNCTIONAL DESCRIPTION SUPPLEMENT Interrupt 3800 group permits interrupts on the basis of 15 sources vec- tor interrupts with a fixed priority system. Accordingly, when two or more interrupt requests occur during the same sampling, the higher-priority interrupt is ...
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HARDWARE FUNCTIONAL DESCRIPTION SUPPLEMENT Timing After Interrupt The interrupt processing routine begins with the machine cycle fol- lowing the completion of the instruction that is currently in execu- tion. SYNC RD WR Address bus Data bus SYNC B A Fig. ...
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APPLICATION 2.1 I/O port 2.2 Timer 2.3 Serial I/O 2.4 Processor mode 2.5 Reset ...
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APPLICATION 2.1 I/O port 2.1 I/O port 2.1.1 Memory map of I/O port 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 0008 16 0009 16 000A 16 000B 16 000C 16 000D ...
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Related registers Port Port Pi (Pi Note : Fig. 2.1.2 Structure ...
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APPLICATION 2.1 I/O port 2.1.3 Handling of unused pins Table 2.1.1 Handling of unused pins (in single-chip mode) Name of Pins/Ports P0, P1, P2, P3, P4, P5, P6 OUT Table 2.1.2 Handling of unused pins (in memory expansion ...
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Timer 2.2.1 Memory map of timer 0020 16 0021 16 0022 16 0023 16 0024 16 0025 16 0026 16 0027 16 003C 16 003D 16 003E 16 003F 16 Fig. 2.2.1 Memory map of timer related registers Prescaler ...
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APPLICATION 2.2 Timer 2.2.2 Related registers Prescaler 12, Prescaler X, Prescaler Fig. 2.2.2 Structure of Prescaler 12, Prescaler X, Prescaler Y Timer ...
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Timer 2, Timer X, Timer Fig. 2.2.4 Structure of Timer 2, Timer X, Timer Y Timer 2 (T2), Timer X (TX), Timer ...
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APPLICATION 2.2 Timer Timer XY mode register Fig. 2.2.5 Structure of Timer XY mode register Table. 2.2.1 Function of CNTR Operating mode of Timer X/Timer Y Timer mode Pulse output mode Event ...
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Interrupt request register Fig. 2.2.6 Structure of Interrupt request register 1 Interrupt request register Fig. 2.2.7 Structure of Interrupt request register 2 ...
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APPLICATION 2.2 Timer Interrupt control register Fig. 2.2.8 Structure of Interrupt control register 1 Interrupt control register Fig. 2.2.9 ...
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Timer application examples (1) Basic functions and uses [Function 1] Control of Event interval (Timer X, Timer Y, Timer 1, Timer 2) The Timer count stop bit is set to “0” after setting a count value to a timer. ...
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APPLICATION 2.2 Timer (2) Timer application example 1 : Clock function (measurement of 250 ms) Outline : The input clock is divided by a timer so that the clock counts up every 250 ms. Specifications : • The clock f(X ...
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Timer XY mode register (Address : Prescaler X (Address : 24 b7 PREX Timer X (Address: Interrupt control register 1 (Address : 3E b7 ICON1 Interrupt request register 1 (Address : 3C b7 IREQ1 Fig. ...
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APPLICATION 2.2 Timer Control procedure : Figure 2.2.12 shows a control procedure. RESET Initialization SEI TM (Address : 23 ICON1 (Address : 3E PREX (Address : 24 TX (Address : 25 TM (Address : 23 CLI Main processing [Processing for ...
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Timer application example 2 : Piezoelectric buzzer output Outline : The rectangular waveform output function of a timer is applied for a piezoelectric buzzer output. Specifications : • The rectangular waveform resulting from dividing clock f(X 2 kHz (2048 ...
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APPLICATION 2.2 Timer Timer XY mode register (Address : Timer X (Address : Prescaler X (Address : 24 b7 PREX Fig. 2.2.15 Setting of related registers [Piezoelectric buzzer output] Control procedure : Figure 2.2.16 ...
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Timer application example 3 : Measurement of frequency Outline : The following two values are compared for judging if the frequency is within a certain range. • A value counted a pulse which is input to P5 • A ...
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APPLICATION 2.2 Timer Timer XY mode register (Address : Prescaler 12 (Address : 20 b7 PRE12 Timer 1 (Address : Prescaler Y (Address : 26 b7 PREY Timer Y (Address : ...
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Control procedure : Figure 2.2.19 shows a control procedure. RESET Initialization SEI (Address : (Address : 20 ) PRE12 16 (Address : (Address : 26 ) PREY 16 (Address : 27 ) ...
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APPLICATION 2.2 Timer (5) Timer application example 4 : Measurement of pulse width of FG pulse generated by motor Outline : The “H” level width of a pulse input to the P5 underflow is detected by Timer X interrupt and ...
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Timer XY mode register (Address : Prescaler X (Address : 24 b7 PREX 255 Timer X (Address : 255 Interrupt control register 1 (Address : ICON1 Interrupt request register (Address : ...
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APPLICATION 2.2 Timer Figure 2.2.22 shows a control procedure. RESET Initialization SEI TM (Address : (Address : 24 ) PREX 16 (Address : ICON1 (Address : 3E ), bit4 16 (Address : 3C ...
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Serial I/O 2.3.1 Memory map of serial I/O 0018 16 0019 16 001A 16 001B 16 001C 16 003A 16 003C 16 003D 16 003E 16 003F 16 Fig. 2.3.1 Memory map of serial I/O related registers Transmit/Receive buffer ...
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APPLICATION 2.3 Serial I/O 2.3.2 Related registers Transmit/Receive buffer register Fig. 2.3.2 Structure of Transmit/Receive buffer register Serial I/O status register Fig. 2.3.3 Structure ...
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Serial I/O control register Fig. 2.3.4 Structure of Serial I/O control register UART control register Fig. 2.3.5 Structure of UART control register Serial I/O ...
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APPLICATION 2.3 Serial I/O Baud rate generator Baud rate generator (BRG) [Address : 1C B Fig. 2.3.6 Structure of Baud rate generator Interrupt edge selection register ...
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Interrupt request register Fig. 2.3.8 Structure of Interrupt request register 1 Interrupt control register Fig. 2.3.9 Structure of Interrupt control register 1 ...
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APPLICATION 2.3 Serial I/O 2.3.3 Serial I/O connection examples (1) Control of peripheral IC equipped with CS pin There are connection examples using a clock synchronous serial I/O mode. Figure 2.3.10 shows connection examples of a peripheral IC equipped with ...
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Connection with microcomputer Figure 2.3.11 shows connection examples of the other microcomputers. (1) Selecting an internal clock 3800 group (3) Using the (Selecting an external clock 3800 group Fig. 2.3.11 Serial I/O ...
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APPLICATION 2.3 Serial I/O 2.3.4 Setting of serial I/O transfer data format A clock synchronous or clock asynchronous (UART) is selected as a data format of the serial I/O. Figure 2.3.12 shows a setting of serial I/O transfer data format. ...
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Serial I/O application examples (1) Communication using a clock synchronous serial I/O (transmit/receive) Outline : 2-byte data is transmitted and received through the clock synchronous serial I/O. The signal is used for communication control. Figure 2.3.13 shows a connection ...
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APPLICATION 2.3 Serial I/O Transmitting side Serial I/O status register (Address : 19 b7 SIOSTS Serial I/O control register (Address : SIOCON Baud rate generator (Address : 1C b7 BRG Interrupt edge selection register ...
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Receiving side Serial I/O status register (Address : 19 b7 SIOSTS Serial I/O control register (Address : 1A b7 SIOCON Fig. 2.3.16 Setting of related registers at a receiving side [Communication using a clock synchronous serial ...
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APPLICATION 2.3 Serial I/O Control procedure : Figure 2.3.17 shows a control procedure at a transmitting side, and Figure 2.3.18 shows a control procedure at a receiving side. RESET Initialization (Address : 1A SIOCON (Address : 1C BRG (Address : ...
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RESET Initialization SIOCON (Address : 1A Pass 2 ms? TB/RB (Address : 18 SIOSTS (Address : 19 Read out reception data from TB/RB (Address : 18 SIOSTS (Address : 19 Read out reception data from TB/RB (Address : 18 Fig. ...
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APPLICATION 2.3 Serial I/O (2) Output of serial data (control of a peripheral IC) Outline : 4-byte data is transmitted and received through the clock synchronous serial I/O. The CS signal is output to a peripheral IC through the port ...
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Figure 2.3.21 shows a setting of serial I/O related registers, and Figure 2.3.22 shows a setting of serial I/O transmission data. Serial I/O control register (Address : SIOCON UART control register ...
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APPLICATION 2.3 Serial I/O Control procedure : When the registers are set as shown in Figure 2.3.21, the Serial I/O can transmit 1-byte data simply by writing data to the Transmit buffer register. Thus, after setting the CS signal to ...
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Cyclic transmission or reception of block data (data of a specified number of bytes) between microcomputers [without using an automatic transfer] Outline : When a clock synchronous serial I/O is used for communication, synchronization of the clock and the ...
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APPLICATION 2.3 Serial I/O The communication is performed according to the timing shown below. In the slave unit, when a synchronizing clock is not input within a certain time (heading adjustive time), the next clock input is processed as the ...
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Control procedure : Control in the master unit After a setting of the related registers is completed as shown in Figure 2.3.33, in the master unit transmission or reception of 1-byte data is started simply by writing transmission data to ...
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APPLICATION 2.3 Serial I/O Control in the slave unit After a setting of the related registers is completed as shown in Figure 2.3.26, the slave unit becomes the state which is received a synchronizing clock at all times, and the ...
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Communication (transmit/receive) using an asynchronous serial I/O (UART) Point : 2-byte data is transmitted and received through an asynchronous serial I/O. The port P4 is used for communication control. 0 Figure 2.3.29 shows a connection diagram, and Figure 2.3.30 ...
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APPLICATION 2.3 Serial I/O Table 2.3.1 shows setting examples of Baud rate generator (BRG) values and transfer bit rate values, Figure 2.3.31 shows a setting of related registers at a transmitting side, and Figure 2.3.32 shows a setting of related ...
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Transmitting side Serial I/O status register (Address : 19 b7 SIOSTS Serial I/O control register (Address : SIOCON UART control register (Address : 1B b7 UARTCON 0 1 Baud rate generator (Address : 1C ...
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APPLICATION 2.3 Serial I/O Receiving side Serial I/O status register (Address : 19 b7 SIOSTS Serial I/O control register (Address : 1A b7 SIOCON UART control register (Address : 1B b7 UARTCON 1 Baud rate generator ...
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Control procedure : Figure 2.3.33 shows a control procedure at a transmitting side, and Figure 2.3.34 shows a control procedure at a receiving side. RESET Initialization (Address : 1A SIOCON 16 (Address : 1B UARTCON 16 (Address : 1C BRG ...
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APPLICATION 2.3 Serial I/O RESET Initialization (Address : 1A SIOCON (Address : 1B UARTCON (Address : 1C BRG (Address : 09 P4D SIOSTS (Address : 19 Read out a reception data from RB (Address : 18 SIOSTS (Address : 19 ...
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Processor mode 2.4.1 Memory map of processor mode 003B 16 Fig. 2.4.1 Memory map of processor mode related register 2.4.2 Related register CPU mode register Fig. 2.4.2 Structure of CPU mode ...
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APPLICATION 2.4 Processor mode 2.4.3 Processor mode application examples (1) Application example of memory expansion in the case where the function is not used Outline : The external memory is accessed in the microprocessor mode ...
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Figure 2.4.4, Figure 2.4.5 and Figure 2.4.6 show a standard timing at 8 MHz (No-Wait). A – (Port P0) A – (Port P1) S (A15) OE (RD of 3800) DQ – (Port P2) WR ...
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APPLICATION 2.4 Processor mode A – (Port P0) A – (Port P1) S (A15) W (WR of 3800) DQ – (Port P2) OE “ H ” level (RD of 3800) Fig. 2.4.6 Write-cycle (W ...
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Application example of memory expansion in the case where the function is used Outline : function is used when the external memory access is slow. ONW If “L” level signal is input to the P3 the read or write ...
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APPLICATION 2.5 Reset 2.5 Reset 2.5.1 Connection example of reset IC Power source M62022L Fig. 2.5.1 Example of Poweron reset circuit Figure 2.5.2 shows the system example which switch to the RAM backup mode by detecting a drop of the ...
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APPENDIX 3.1 Electrical characteristics 3.2 Standard characteristics 3.3 Notes on use 3.4 Countermeasures against noise 3.5 List of registers 3.6 Mask ROM ordering method ...
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APPENDIX 3.1 Electrical characteristics 3.1 Electrical characteristics 3.1.1 Absolute maximum ratings Table 3.1.1 Absolute maximum ratings Symbol V Power source voltage CC V Input voltage P0 – – Input voltage RESET Input ...
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Electrical characteristics Table 3.1.3 Electrical characteristics (V Symbol Parameter “H” output voltage P0 – – –P6 0 “L” output voltage P0 – – – – ...
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APPENDIX 3.1 Electrical characteristics 3.1.4 Timing requirements and Switching characteristics Table 3.1.4 Timing requirements (1) (V Symbol t Reset input “L” pulse width W(RESET) t External clock input cycle time c External clock input “H” pulse width ...
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Table 3.1.6 Switching characteristics (1) (V Symbol Parameter t Serial I/O clock output “H” pulse width WH(S ) CLK t Serial I/O clock output “L” pulse width WL(S ) CLK t Serial I/O output delay time (Note 1) d(S –T ...
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APPENDIX 3.1 Electrical characteristics Table 3.1.8 Timing requirements in memory expansion mode and microprocessor mode (1) Symbol t Before ONW input set up time su(ONW– After ONW input hold time h( –ONW) t Before data bus set up ...
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Table 3.1.10 Timing requirements in memory expansion mode and microprocessor mode (2) Symbol t Before ONW input set up time su(ONW– After ONW input hold time h( –ONW) t Before data bus set up time su(DB– ...
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APPENDIX 3.1 Electrical characteristics 3.1.5 Absolute maximum ratings (Extended operating temperature version) Table 3.1.12 Absolute maximum ratings (Extended operating temperature version) Symbol Parameter V Power source voltage CC V Input voltage P0 – – –P6 ...
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Electrical characteristics (Extended operating temperature version) Table 3.1.14 Electrical characteristics (Extended operating temperature version) Symbol Parameter “H” output voltage P0 – – –P6 0 “L” output voltage P0 – –P3 ...
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APPENDIX 3.1 Electrical characteristics 3.1.8 Timing requirements and Switching characteristics (Extended operating temperature version) Table 3.1.15 Timing requirements (Extended operating temperature version) Symbol t Reset input “L” pulse width W(RESET) t External clock input cycle time c ...
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Table 3.1.17 Timing requirements in memory expansion mode and microprocessor mode (Extended operating temperature version) (V Symbol t Before ONW input set up time su(ONW– After ONW input hold time h( –ONW) t Before data bus set up ...
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APPENDIX 3.1 Electrical characteristics 3.1.9 Timing diagram Timing Diagram CNTR , CNTR 0 1 INT INT 0– 5 RESET CLK Fig. 3.1.2 Timing diagram (in single-chip mode) 3-12 t C(CNTR) t ...
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Timing Diagram in Memory Expansion Mode and Microprocessor Mode (1) AD – – SYNC RD,WR ONW DB – (At CPU reading) DB – (At CPU writing) Timing Diagram in Microprocessor Mode ...
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APPENDIX 3.1 Electrical characteristics Timing Diagram in Memory Expansion Mode and Microprocessor Mode (2) RD,WR AD – – ONW (At CPU reading – (At CPU writing – ...
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Standard characteristics 3.2.1 Power source current characteristic examples Figures 3.2.1 and Figure 3.2.2 show power source current characteristic examples. Power source current Fig. 3.2.1 Power source current characteristic example Power source current Fig. 3.2.2 Power source current characteristic example ...
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APPENDIX 3.2 Standard characteristics 3.2.2 Port standard characteristic examples Figures 3.2.3, Figure 3.2.4, Figure 3.2.5 and Figure 3.2.6 show port standard characteristic examples. [Port P0 0 (Pins with same characteristic : P0, P1, P2, P3, P4, P5, P6, P7) I ...
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(Pins with same characteristic : P0, P1, P2, P3, P4, P5, P6, P7 (mA) Fig. 3.2.5 Standard characteristic example of CMOS output port at N-channel drive (1) [Port (Pins with same ...
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APPENDIX 3.3 Notes on use 3.3 Notes on use 3.3.1 Notes on interrupts (1) Sequence for switching an external interrupt detection edge When the external interrupt detection edge must be switched, make sure the following sequence. Reason The interrupt circuit ...
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Stop of data transmission and reception in a clock synchronous serial I/O mode As for the serial I/O that can be used as either a clock synchronous or an asynchronous (UART) serial I/O, clear both the transmit enable bit ...
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APPENDIX 3.3 Notes on use 3.3.4 Notes on input and output pins (1) Fix of a port input level in stand-by state Fix input levels of an input and an I/O port for getting effect of low-power dissipation in stand-by ...
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Notes on memory expansion mode and microprocessor mode (1) Writing data to the port latch of port P3 In the memory expansion or the microprocessor mode, ports P3 LDM or STA instruction for writing data to the port latch ...
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... M38002E2SP M38002E4SP M38004E8SP (one-time blank) M38002E4DSP (one-time blank) M38002E4FS M38004E8FS M38002E2FP M38002E4FP M38004E8FP (one-time blank) M38002E4DFP (one-time blank) (2) Write and read In PROM mode, operation is the same as that of the M5M27C256AK, but programming conditions of PROM programmer are not set automatically because there are no internal device ID codes. ...
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... Table 3.3.3 Setting of PROM programmer address Microcomputer M38002E2SP M38002E2FP M38002E4SS M38002E4SP M38002E4FS M38002E4FP M38002E4DSP M38002E4DFP M38004E8SS M38004E8SP M38004E8FS M38004E8FP Note1 : Addresses E080 to FFFD 16 ROM programmer Addresses C080 to FFFD 16 ROM programmer Addresses 8080 to FFFD 16 ROM programmer. (3) Erasing Contents of the windowed EPROM are erased through an ultraviolet light source of the wavelength 2537- Angstrom ...
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APPENDIX 3.4 Countermeasures against noise 3.4 Countermeasures against noise Countermeasures against noise are described below. The following countermeasures are effective against noise in theory, however necessary not only to take measures as follows but to evaluate before actual ...
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Noise OUT V SS N.G. Fig. 3.4.2 Wiring for clock I/O pins (3) Wiring for the V pin of the One Time PROM PP version and the EPROM version (In this microcomputer the V as the CNV ...
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APPENDIX 3.4 Countermeasures against noise 3.4.3. Consideration for oscillator Take care to prevent an oscillator that generates clocks for a microcomputer operation from being affected by other signals. (1) Keeping an oscillator away from large current signal lines Install a ...
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Providing of watchdog timer function by software If a microcomputer runs away because of noise or others, it can be detected by a software watchdog timer and the microcomputer can be reset to normal operation. This is equal to ...
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APPENDIX 3.5 List of registers 3.5 List of registers Port Port Pi (Pi ...
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Transmit/Receive buffer register Note : A content of the Transmit buffer register cannot be read out. Fig. 3.5.3 Structure of Transmit/Receive buffer register Serial I/O status register ...
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APPENDIX 3.5 List of registers Serial I/O control register Fig. 3.5.5 Structure of Serial I/O control register UART control register Fig. 3.5.6 Structure of ...
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Baud rate generator Fig. 3.5.7 Structure of Baud rate generator Prescaler 12, Prescaler X, Prescaler Fig. 3.5.8 Structure of Prescaler 12, Prescaler X, ...
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APPENDIX 3.5 List of registers Timer Fig. 3.5.9 Structure of Timer 1 Timer 2, Timer X, Timer Fig. 3.5.10 Structure of Timer ...
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Timer XY mode register Fig. 3.5.11 Structure of Timer XY mode register Table. 3.5.1 Function of CNTR Operating mode of Timer X/Timer Y Timer mode Pulse output mode Event counter mode Pulse ...
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APPENDIX 3.5 List of registers Interrupt edge selection register Interrupt edge selection register (INTEDGE) [Address : Fig. 3.5.12 Structure of Interrupt edge ...
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Interrupt request register Fig. 3.5.14 Structure of Interrupt request register 1 Interrupt request register Fig. 3.5.15 Structure of Interrupt request register 2 ...
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APPENDIX 3.5 List of registers Interrupt control register Fig. 3.5.16 Structure of Interrupt control register 1 Interrupt control register Fig. ...
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Mask ROM ordering method GZZ-SH04-34B<13B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M2-XXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH04-34B<13B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M2-XXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. EPROM type The pseudo-command ...
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GZZ-SH04-79B<16A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M2DXXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH04-79B<16A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M2DXXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. EPROM type The pseudo-command ...
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GZZ-SH03-22B<9YB0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M4-XXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH03-22B<9YB0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M4-XXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. EPROM type The pseudo-command ...
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GZZ-SH05-12B<21A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M4DXXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH05-12B<21A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38002M4DXXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. EPROM type The pseudo-command ...
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GZZ-SH04-62B<14B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38003M6-XXXSP/FP/HP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH04-62B<14B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38003M6-XXXSP/FP/HP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. EPROM type The pseudo-command ...
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GZZ-SH04-30B<13B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38004M8-XXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH04-30B<13B0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38004M8-XXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. We recommend the use ...
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GZZ-SH07-23B<33A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38004M8DXXXSP/FP MITSUBISHI ELECTRIC Company name Customer Date Date: issued 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each ...
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APPENDIX 3.6 Mask ROM ordering method GZZ-SH07-23B<33A0> 740 FAMILY MASK ROM CONFIRMATION FORM SINGLE-CHIP MICROCOMPUTER M38004M8DXXXSP/FP MITSUBISHI ELECTRIC We recommend the use of the following pseudo-command to set the start address of the assembler source program. We recommend the use ...
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Mark specification form 3800 GROUP USER’S MANUAL APPENDIX 3.7 Mark specification form 3-51 ...
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APPENDIX 3.7 Mark specification form 3-52 3800 GROUP USER’S MANUAL ...
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Package outline 2.5/1 2.5/1 3800 GROUP USER’S MANUAL APPENDIX 3.8 Package outline 3-53 ...
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APPENDIX 3.8 Package outline 2.5/1 1.5/1 3-54 3800 GROUP USER’S MANUAL ...
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GROUP USER’S MANUAL APPENDIX 3.8 Package outline 3-55 ...
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APPENDIX 3.9 Machine instructions 3.9 Machine instructions Symbol Function ADC When Adds the carry, accumulator and memory con- (Note tents. The results are entered into the (Note 5) accumulator. When ...
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ZP, X ZP, Y ABS ABS ...
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APPENDIX 3.9 Machine instructions Symbol Function BVC Branches when the contents of overflow flag is (Note 4) “0”. BVS Branches when the contents of overflow flag is “1”. (Note 4) CLB ...
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ZP, X ZP, Y ABS ABS ...
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APPENDIX 3.9 Machine instructions Symbol Function JMP If addressing mode is ABS Jumps to the specified address addressing mode is IND ...
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ZP, X ZP, Y ABS ABS ...
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APPENDIX 3.9 Machine instructions Symbol Function PHA M(S) A Saves the contents of the accumulator – 1 memory at the address indicated by the stack pointer and decrements the contents of stack pointer by 1. PHP M(S) ...
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ZP, X ZP, Y ABS ABS ...
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APPENDIX 3.9 Machine instructions Symbol Function STA M A Stores the contents of accumulator in memory. STP Stops the oscillator. STX M X Stores the contents of index register X in memory. STY M Y Stores the contents of index ...
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ZP, X ZP, Y ABS ABS ...
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APPENDIX 3.10 List of instruction codes 3.10 List of instruction codes D – D 0000 0001 0010 3 0 Hexadecimal – notation ORA JSR BRK 0000 0 IND, X ZP, IND ORA BPL CLT ...
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SFR memory map 0000 Port P0 (P0) 16 0001 Port P0 direction register (P0D) 16 0002 Port P1 (P1) 16 0003 Port P1 direction register (P1D) 16 0004 Port P2 (P2) 16 0005 Port P2 direction register (P2D) 16 ...
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APPENDIX 3.12 Pin configuration 3.12 Pin configuration PIN CONFIGURATION (TOP VIEW /SYNC /RESET 3 OUT 54 P3 /ONW ...
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PIN CONFIGURATION (TOP VIEW) P5 /CNTR 5 P5 /CNTR CNV RESET ...
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MITSUBISHI SEMICONDUCTORS USER’S MANUAL 3800Group Mar. First Edition 1996 Editioned by Committee of editing of Mitsubishi Semiconductor USER’S MANUAL Published by Mitsubishi Electric Corp., Semiconductor Marketing Division This book, or parts thereof, may not be reproduced in any form without ...
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User’s Manual 3800 Group H-EE418-A KI-9603 Printed in Japan (ROD) © 1996 MITSUBISHI ELECTRIC CORPORATION New publication, effective Mar. 1996. Specifications subject to change without notice. ...