MC100ES6222 Integrated Device Technology, Inc., MC100ES6222 Datasheet
MC100ES6222
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MC100ES6222 Summary of contents
Page 1
... In the case where not all ten outputs are used, the output pairs on the same package side as the parts being used on that side should be terminated. The MC100ES6222 can be operated from a single 3 2.5 V supply. As most other ECL compatible devices, the MC100ES6222 supports positive (PECL) and negative (ECL) supplies. The MC100ES6222 is pin and function compatible to the MC100EP222. ...
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... Figure 2. 52-Lead Package Pinout (Top View) 1 ÷2 ÷2 ÷2 ÷2 CLK1 Reset and Q X MC100ES6222 REV. 5 FEBRUARY 27, 2008 26 QD0 25 QD0 24 QD1 23 QD1 22 QD2 21 QD2 20 QD3 19 QD3 18 QD4 17 QD4 16 QD5 15 QD5 14 ...
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... both modes, the input and output levels are (1) Characteristics 3 Description pins must be connected to the positive power supply for correct is connected to GND (0 V). In PECL mode (positive CC Min Max Unit –0.3 3.6 V –0 0 –0 0 ±20 mA ±50 mA °C –65 125 ° – +110 A J MC100ES6222 REV. 5 FEBRUARY 27, 2008 Condition ...
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... AN1545 for more information). The device AC and DC parameters are specified up to 110°C junction temperature allowing the MC100ES6222 to be used in applications requiring industrial temperature range recommended that users of the MC100ES6222 employ thermal modeling analysis to assist in applying the junction temperature specifications to their particular application ...
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... –0.880 V –1.475 V ±150 µ –0 1 170 mA V pins EE –1. 0 ÷ – load OL TT load EE MC100ES6222 REV. 5 FEBRUARY 27, 2008 = (4) (4) (DC) CMR ...
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... V V 2000 MHz Differential 820 970 ps Differential Differential 130 ps 300 ps Differential 50. 51. 53. 300 ps 20% to 80% (AC (AC) impacts the device CMR PP – pLH pHL MC100ES6222 REV. 5 FEBRUARY 27, 2008 Condition = 50% REF = 50% REF = 50% REF ...
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... Figure 3. MC100ES6222 AC Test Reference (CLK Figure 4. MC100ES6222 t Measurement Waveform PD APPLICATIONS INFORMATION Figure 5. Functional Diagram Ω Ω 50 CLK (÷ (÷1) X MC100ES6222 REV. 5 FEBRUARY 27, 2008 ...
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... This will reduce the device power consumption while maintaining minimum output skew. Power Supply Bypassing The MC100ES6222 is a mixed analog/digital product. The differential architecture of the MC100ES6222 supports low ⋅ P noise signal operation at high frequencies. In order to ...
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... Junction to top of package It is recommended to employ thermal modeling analysis to assist in applying the general recommendations to their particular application. The exposed pad of the MC100ES6222 package does not have an electrical low Figure 8. impedance path to the substrate of the integrated circuit and illustrates a its terminals. The thermal land should be connected to GND through connection of internal board layers ...
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... PROTRUSION. ALLOWABLE PROTRUSION IS 0.25mm PER SIDE. THIS DIMENSION IS MAXIMUM PLSTIC BODY SIZE DIMENSION INCLUDING MOLD MISMATCH. 7. EXACT SHAPE OF EACH CORNER IS OPTIONAL. 8. THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10mm AND 0.25mm FROM THE LEAD TIP. MC100ES6222 REV. 5 FEBRUARY 27, 2008 ...
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... MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U ...