ISPLSI2128E-100LT176 Lattice Semiconductor Corp., ISPLSI2128E-100LT176 Datasheet
ISPLSI2128E-100LT176
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ISPLSI2128E-100LT176 Summary of contents
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... Optimized Global Routing Pool Provides Global Interconnectivity Copyright © 2002 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. ...
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Functional Block Diagram Figure 1. ispLSI 2128E Functional Block Diagram RESET GOE 0 GOE 1 Megablock I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 I/O 11 ...
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Absolute Maximum Ratings Supply Voltage V .................................. -0.5 to +7.0V cc Input Voltage Applied ........................ -2 Off-State Output Voltage Applied ..... -2 Storage Temperature ................................ -65 to 150°C Case Temp. with Power Applied .............. -55 to ...
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Switching Test Conditions Input Pulse Levels Input Rise and Fall Time 10% to 90% Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see Figure 2) TEST ...
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External Timing Parameters TEST 2 PARAMETER # 4 COND Data Prop Delay, 4PT Bypass, ORP Bypass pd1 Data Prop Delay pd2 Clk Freq with Internal Feedback max f – 4 Clk ...
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Internal Timing Parameters 2 PARAMETER # Inputs t 20 Input Buffer Delay Dedicated Input Delay din GRP t 22 GRP Delay grp GLB Product Term Bypass Path Delay (Combinatorial) 4ptbpc Product ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset #43, 44 Y0,1,2 GOE0 Derivations of su, h and co from the Product Term Clock Logic ...
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Power Consumption Power consumption in the ispLSI 2128E device depends on two primary factors: the speed at which the device is operating and the number of Product Terms used. Figure 3. Typical Device Power Consumption vs fmax 500 450 400 ...
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Pin Description NAME TQFP PIN NUMBERS I I/O 4 27, 28, 31, 32, I I/O 9 35, 36, 37, 38, 41, 42, 43, 44, I I I/O 19 46, 47, ...
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Pin Configuration ispLSI 2128E 176-Pin TQFP Pinout Diagram 1 GND 2 I/O 114 3 I/O 115 4 I/O 116 5 I/O 117 6 I/O 118 I/O 119 7 I/O 120 8 9 I/O 121 10 VCCIO 11 GND 12 I/O ...
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Part Number Description ispLSI 2128E XXX X XXXX Device Family Device Number Speed f 180 = 180 MHz max f 135 = 135 MHz max f 100 = 100 MHz max ispLSI 2128E Ordering Information FAMILY fmax (MHz) tpd (ns) ...