ICS5310AI01L Integrated Device Technology, Inc., ICS5310AI01L Datasheet
ICS5310AI01L
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ICS5310AI01L Summary of contents
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Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS85310I- low skew, high perfor mance 1-to-10 Differential-to-2.5V/3.3V ECL/ HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Perfor mance Clock Solutions ...
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Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...
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Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 50mA Surge Current 100mA Package Thermal Impedance, θ JA Storage Temperature, T -65°C to ...
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Integrated Circuit Systems, Inc 3D. LVPECL DC C ABLE HARACTERISTICS ...
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Integrated Circuit Systems, Inc. D The spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase ...
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Integrated Circuit Systems, Inc ARAMETER CCO LVPECL V EE -0.375V to -1.8V 3. UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART 2 Qy tsk(pp ...
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Integrated Circuit Systems, Inc IRING THE IFFERENTIAL NPUT TO Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ V generated by the bias resistors R1, ...
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Integrated Circuit Systems, Inc IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING V and V input requirements. Figures show inter- ...
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Integrated Circuit Systems, Inc LVPECL O ERMINATION FOR UTPUTS The clock layout topology shown below is a typical termina- tion for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low ...
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Integrated Circuit Systems, Inc. D This section provides information on power dissipation and junction temperature for the ICS85310I-01. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85310I-01 is the sum of the ...
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Integrated Circuit Systems, Inc Calculations and Equations. LVPECL output driver circuit and termination are shown in Figure 4. F IGURE T o calculate worst case power dissipation into the load, use the following equations which assume a 50Ω ...
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Integrated Circuit Systems, Inc. D θ ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The ...
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Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR ABLE ...
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Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...
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Integrated Circuit Systems, Inc ...