AD7841 Analog Devices, AD7841 Datasheet

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AD7841

Manufacturer Part Number
AD7841
Description
Octal 14-Bit DACs on One Monolithic Chip
Manufacturer
Analog Devices
Datasheet

Specifications of AD7841

Resolution (bits)
14bit
Dac Update Rate
32kSPS
Dac Settling Time
31µs
Max Pos Supply (v)
+16.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Par

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a
LDAC
DB13
DB0
WR
CS
A0
A1
A2
AD7841
GND
V
CC
14
14
14
14
14
14
14
14
V
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
SS
REG
REG
REG
REG
REG
REG
REG
REG
B
C
D
E
G
H
A
F
V
14
14
14
14
14
14
14
14
DD
DAC
REG
DAC
REG
DAC
REG
DAC
REG
DAC
REG
DAC
REG
DAC
REG
DAC
REG
D
G
H
A
B
C
E
F
14
14
14
14
14
14
14
14
V
REF
V
GH
FUNCTIONAL BLOCK DIAGRAM
REF
AB
(+)
DAC H
DAC A
(+)
V
REF
GH
V
(–)
REF
AB
DAC G
(–)
DAC B
DAC F
V
CDEF
GENERAL DESCRIPTION
The AD7841 contains eight 14-bit DACs on one monolithic
chip. It has output voltages with a full-scale range of ± 10 V
from reference voltages of ± 5 V.
The AD7841 accepts 14-bit parallel loaded data from the exter-
nal bus into one of the input registers under the control of the
WR, CS, and DAC channel address pins, A0–A2.
The DAC outputs are updated on reception of new data into
the DAC registers. All the outputs may be updated simulta-
neously by taking the LDAC input low.
Each DAC output is buffered with a gain-of-two amplifier into
which an external DAC offset voltage can be inserted via the
DUTGNDx pins.
The AD7841 is available in a 44-lead MQFP package.
REF
(+)
DAC C
V
CDEF
REF
(–)
Octal 14-Bit, Parallel Input,
DAC D
DUTGND
CLR
DAC E
CD
DUTGND
Voltage-Output DAC
EF
DUTGND
DUTGND
AB
GH
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
AD7841
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
C
D
E
F
G
H

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AD7841 Summary of contents

Page 1

... It has output voltages with a full-scale range of ± from reference voltages of ± The AD7841 accepts 14-bit parallel loaded data from the exter- nal bus into one of the input registers under the control of the WR, CS, and DAC channel address pins, A0–A2. ...

Page 2

... See DUTGND Voltage Range section. The AD7841 is functional with power supplies of ± ± 10% with reduced output range. Output amplifier requires 2 head room at the bottom and top ends 4 of the transfer for function supplies it is recommended to restrict the reference range to ± ...

Page 3

... V 10%; GND = DUTGND = Description Address to WR Setup Time Address to WR Hold Time CS Pulsewidth Low WR Pulsewidth Low Setup Time Hold Time Data Setup Time Data Hold Time Settling Time CLR Pulse Activation Time LDAC Pulsewidth Low t 11 AD7841 ...

Page 4

... more than 0 possible for this to happen IN4148 HP5082-2811 AD7841 Package Option S-44 S- DUTGND_GH OUT 31 V (–)GH REF 30 V (+)GH REF 29 CLR DB13 28 27 DB12 26 DB11 25 DB10 ...

Page 5

... Level-Triggered Chip Select Input (active low). The device is selected when this input is low. Level-Triggered Write Input (active low), used in conjunction with CS to write data to the AD7841 data registers. Data is latched into the selected input register on the rising edge of WR. Logic Power Supply ± 5%. ...

Page 6

... DACs will reflect the data stored in the relevant DAC registers. (+) = +5 V and REF Data Loading to the AD7841 Data is loaded into the AD7841 in straight parallel 14-bit wide words. The DAC output voltages, V reflect new data in the DAC registers. The actual input register being written to is determined by the logic levels present on the device’ ...

Page 7

... REF(–) ZERO-SCALE ERROR 0 FULL-SCALE ERROR –2 –4 –40 – 100 TEMPERATURE – C 10.19 10.18 10.17 10. SETTLING TIME – s AD7841 +15V –15V SS V (+) = +5V REF V (–) = –5V REF 2 0 –2 –1 –40 – 100 TEMPERATURE – C ...

Page 8

... V/16384 = 610 µV. 14 For V (+) = LSB = 10 V/2 REF Bipolar Configuration Figure 3 shows the AD7841 set up for ± operation. The AD588 provides precision ± tracking outputs that are fed to the V (+) and V (–) inputs of the AD7841. The code table REF REF for bipolar operation of the AD7841 is shown in Table III ...

Page 9

... OUT Power-On with CLR High If CLR is high on the application of power to the device, the output stages of the AD7841 are configured as in Figure 8 while V is less than 7 V and V DD closed and G DAC to the input of its output amplifier. G CLR while unity gain buffer. V through a 14 kΩ ...

Page 10

... A minimum etch technique is generally best for ground planes as it gives the best shielding. Digital and ana- log ground planes should be joined at only one place. The GND pin of the AD7841 should be connected to the AGND of the on power-up, current system. If the AD7841 system where multiple devices ...

Page 11

... AD7841. The AD7841 uses nominal reference values of ± achieve –15V an output span of ± Since the AD7841 has a gain of two from the reference inputs to the DAC output, adjusting the reference voltages by ± 150 mV will adjust the DAC offset and ...

Page 12

... SEATING PLANE TOP VIEW (PINS DOWN 0.040 (1.02) 0.040 (1.02) 0.032 (0.81) 0.032 (0.81) 0.033 (0.84) 0.083 (2.11) 0.029 (0.74) 0.077 (1.96) (–) inputs on the AD7841. However, the digital REF A0, A1 (+)AB REF OUT OUT AD7841 )AB REF OUT ...

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