SAA7111WP Philips Semiconductors, SAA7111WP Datasheet
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DATA SHEET SAA7111 Video Input Processor (VIP) Product specification Supersedes data of 1996 Oct 30 File under Integrated Circuits, IC22 INTEGRATED CIRCUITS 1998 May 15 ...
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... Philips Semiconductors Video Input Processor (VIP) CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAM 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 Analog input processing 8.2 Analog control circuits 8.2.1 Clamping 8.2.2 Gain control 8.3 Chrominance processing 8.4 Luminance processing 8.5 RGB matrix 8.6 VPO-bus (digital outputs) 8.7 Synchronization 8.8 Clock generation circuit 8 ...
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... Philips Semiconductors Video Input Processor (VIP) 1 FEATURES Four analog inputs, internal analog source selectors, e.g. 4 CVBS Two analog preprocessing channels Fully programmable static gain for the main channels or automatic gain control for the selected CVBS or Y/C channel Switchable white peak control ...
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... V analog supply voltage DDA T operating ambient temperature amb P analog and digital power A+D 5 ORDERING INFORMATION TYPE NUMBER NAME SAA7111WP PLCC68 plastic leaded chip carrier; 68 leads SAA7111H QFP64 plastic quad flat package; 64 leads (lead length 1.6 mm); body 14 1998 May 15 PARAMETER PACKAGE DESCRIPTION 14 2 Product specification SAA7111 MIN ...
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... Philips Semiconductors Video Input Processor (VIP) 6 BLOCK DIAGRAM handbook, full pagewidth 23 (14) AOUT ANALOG 21 (12) PROCESSING AI11 19 (10) AND AI12 ANALOG-TO- DIGITAL CONVERSION 17 (8) AI21 15 (6) AI22 AD2 AD1 7,8,9 (64) n.c. 22 (13 CON ANALOG 10,36, 37 PROCESSING n.c. CONTROL 18,14 (9,5) V SSA1-2 20,16 (11,7) V DDA1-2 TEST 12 (3) CONTROL TDI ...
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... Philips Semiconductors Video Input Processor (VIP) 7 PINNING PINS SYMBOL PLCC68 QFP64 TRST 1 TCK 2 RTCO 3 IICSA 4 SDA 5 SCL 6 n.c. 7 n.c. 8 n.c. 9 n.c. 10 TDO 11 TDI 12 TMS SSA2 AI22 DDA2 AI21 SSA1 AI12 DDA1 AI11 SSS AOUT DDA0 V 25 SSA0 ...
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... Philips Semiconductors Video Input Processor (VIP) PINS SYMBOL PLCC68 QFP64 RES DD4 V 35 SS4 n. RTS1 39 RTS0 HREF SS3 V 44 DD3 VPO ( SS2 V 52 DD2 1998 May 15 I Reset output (active LOW); sets the device into a defined state. ...
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... Philips Semiconductors Video Input Processor (VIP) PINS SYMBOL PLCC68 QFP64 VPO ( FEI 63 GPSW 64 XTAL 65 XTALI SS1 V 68 DD1 Notes 1. For board design without boundary scan implementation (pin compatibility with the SAA7110) connect the TRST pin to ground. ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth n.c. 10 TDO 11 TDI 12 TMS SSA2 15 AI22 V 16 DDA2 17 AI21 V SSA1 18 AI12 DDA1 AI11 AOUT 24 V DDA0 V 25 SSA0 26 VREF 1998 May 15 SAA7111 Fig.2 Pin configuration (PLCC68). 9 Product specification ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth n.c. 1 TDO 2 3 TDI 4 TMS V SSA2 5 6 AI22 V DDA2 7 AI21 8 V SSA1 9 10 AI12 V DDA1 11 AI11 AOUT V DDA0 15 V SSA0 16 1998 May 15 SAA7111 Fig.3 Pin configuration (QFP64). 10 Product specification SAA7111 ...
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... Philips Semiconductors Video Input Processor (VIP) 8 FUNCTIONAL DESCRIPTION 8.1 Analog input processing The SAA7111 offers four analog signal inputs, two analog main channels with clamp circuit, analog amplifier, anti-alias filter and video CMOS ADC (see Fig.6). 8.2 Analog control circuits The anti-alias filters are adapted to the line-locked clock frequency with help from a filter control ...
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... Philips Semiconductors Video Input Processor (VIP) The burst processing block provides the feedback loop of the chroma PLL and contains; Burst gate accumulator Colour identification and killer Comparison nominal/actual burst amplitude Loop filter chroma gain control Loop filter chroma PLL PAL sequence generation Increment generation for DTO1 with divider to generate stable subcarrier for non-standard signals ...
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... Philips Semiconductors Video Input Processor (VIP) Fast enable is achieved by setting input FEI to LOW. The signal is used to control fast switching on the digital VPO-bus. HIGH on this pin forces the YUV outputs to a high-impedance state (see Figs 15 and 17). The digitized analog PAL or NTSC signals AD1 ( ...
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Acrobat reader. white to force landscape pages to be ... 64 n. SSA1 5 V SSA2 6 AI22 SOURCE CLAMP 8 SWITCH ...
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Acrobat reader. white to force landscape pages to be ... LUM CHR 10 (1) n.c. 1 (58) TRST 2 (59) QUADRATURE TCK TEST 12 ...
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Acrobat reader. white to force landscape pages to be ... LUM LUMINANCE CIRCUIT CHROMINANCE PREFILTER TRAP PREF BYPS VBLB PREFILTER SYNC LINE 21 TEXT ...
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... Philips Semiconductors Video Input Processor (VIP) 9 GAIN CHARTS handbook, halfpage handbook, full pagewidth NO BLANKING ACTIVE 1 CLL CLAMP WIPE = white peak level (254); SBOT = sync bottom level (1); CLL = clamp level [60 Y (128 C)]; HSY = horizontal sync pulse; HCL = horizontal clamp pulse. 1998 May 15 7 ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth NO ACTION STOP X = system variable AGV FGVI > GUDL; VBLK = vertical blanking pulse; HSY = horizontal sync pulse; AGV = actual gain value; FGV = frozen gain value. 1998 May 15 ANALOG INPUT gain AMPLIFIER ANTI-ALIAS FILTER ADC ...
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... Philips Semiconductors Video Input Processor (VIP) 10 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER V digital supply voltage DDD V analog supply voltage DDA V voltage difference between V diff V SSall T storage temperature stg T operating ambient temperature amb T operating ambient temperature under bias ...
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... Philips Semiconductors Video Input Processor (VIP) SYMBOL PARAMETER Digital inputs V LOW-level input voltage pins IL SDA and SCL V HIGH-level input voltage pins IH SDA and SCL V LOW-level CMOS input IL(xtalI) voltage pin XTALI V HIGH-level CMOS input IH(xtalI) voltage pin XTALI V LOW-level input voltage all ...
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... Philips Semiconductors Video Input Processor (VIP) SYMBOL PARAMETER Clock output timing (LLC and LLC2) C output load capacitance L(LLC) T cycle time cy LLC duty factors for t LLCH t /t LLC2H LLC2 t rise time r t fall time f t delay time LLC output to LLC2 dLLC2 output Data qualifi ...
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... Philips Semiconductors Video Input Processor (VIP) SYMBOL PARAMETER Crystal oscillator f nominal frequency n f/f permissible nominal n frequency deviation f/f (T) permissible nominal n frequency deviation with temperature C (X1) RYSTAL SPECIFICATION T operating ambient ambX1 temperature C load capacitance L R series resonance resistor s C motional capacitance 1 C parallel capacitance ...
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... Philips Semiconductors Video Input Processor (VIP) 12 TIMING DIAGRAMS handbook, full pagewidth CLOCK OUTPUT LLC OUTPUTS VPO, HREF, VREF, VS explanation of the output formats is given in Table 5. Fig.12 Clock/data timing (8-bit CCIR-656 format of the VPO-bus). handbook, full pagewidth CLOCK OUTPUT LLC OUTPUT CREF ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth CLOCK OUTPUT LLC t LLCH OUTPUT CREF RGB ( data VPO15 to VPO8 RGB ( data VPO7 to VPO0 An explanation of the output formats is given in Table 5. handbook, full pagewidth LLC CREF HREF FEI VPO 2 I C-bit FECO = 1. ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth LOW HIGH 128 BIT NO.: 15 TIME SLOT (1) Set to zero for one transmission phase reset of the f The HPLL increment represents the actual LFCO frequency (f INCR f HPLL XTAL f = ------------------------------------------------ - LFCO word length DTO2 ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth LLC CREF LLC2 START OF ACTIVE LINE HREF Yn UVn HREF 715 Yn V714 UVn 1998 May 716 717 718 U716 V716 U718 Fig.18 HREF timing diagram. 26 Product specification SAA7111 ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth Y - output HREF (50 Hz) RTS1 (PLIN) HS (50 Hz) programming range (step size: 8/LLC) HREF (60 Hz) HS (60 Hz) HS (60 Hz) programming range (step size: 8/LLC) (1) PLIN is switched to output RTS1 via I (2) See Table 1. 1998 May 2/LLC ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth 623 622 input CVBS HREF VREF VRLN = 1 VREF VRLN = 0 VS (1) RTS0 (ODD) 310 311 input CVBS HREF VRLN = 1 VREF VRLN = 0 VREF VS (1) RTS0 (ODD) (1) ODD is switched to output RTS0 via I The luminance peaking and the chrominance trap are bypassed during VREF = The chrominance delay line (chroma-comb filter for NTSC, phase error correcting for PAL) is disabled during VREF = 0 ...
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... Philips Semiconductors Video Input Processor (VIP) 522 523 handbook, full pagewidth (525) (1) input CVBS HREF VRLN = 1 VREF VRLN = 0 VREF VS (1) RTS0 (ODD) 259 260 (263) (262) input CVBS HREF VRLN = 1 VREF VRLN = 0 VREF VS (1) RTS0 (ODD) (1) ODD is switched to output RTS0 via I (2) Line numbers in parenthesis refer to CCIR line counting ...
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... Philips Semiconductors Video Input Processor (VIP) Table 2 Digital output control OEYC FEI ( active Notes 1. OFTS 00. 2. OFTS 11. 13 CLOCK SYSTEM 13.1 Clock generation circuit The internal CGC generates the system clocks LLC, LLC2 and the clock reference signal CREF ...
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... Philips Semiconductors Video Input Processor (VIP) 13.2 Power-on control Power-on reset is activated at power-on, chip enable, PLL clock generation failure and if the supply voltage falls below 3.5 V. The RES signal can be applied to reset other circuits of the digital picture processing system. andbook, full pagewidth CE CE ...
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... Philips Semiconductors Video Input Processor (VIP) Table 4 Power-on control sequence INTERNAL POWER-ON CONTROL SEQUENCE Directly after power-on VPO15 to VPO0, RTCO, RTS0, RTS1, asynchronous reset GPSW, HREF, VREF, HS, VS, LLC, LLC2 and CREF are in high-impedance state Synchronous reset LLC, LLC2, CREF, RTCO, RTS0, RTS1, sequence GPSW and SDA become active ...
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... Philips Semiconductors Video Input Processor (VIP) 255 handbook, full pagewidth 235 128 LUMINANCE 100 output range. CCIR Rec. 602 digital levels. Equations for modification to the YUV levels via BCS control I Luminance: CONT Y = Int ----------------- - Y 128 – + BRIG OUT 71 Chrominance: SATN ...
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... Philips Semiconductors Video Input Processor (VIP) 15 APPLICATION INFORMATION handbook, full pagewidth DDA C8 100 nF V SSA C4 AI22 SSA C3 AI21 SSA C2 AI12 SSA C1 AI11 SSA R5 V DDD 1 k SCL SDA FEI XTAL Q1(24 ...
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... Philips Semiconductors Video Input Processor (VIP) handbook, full pagewidth (34) 45 (35) 46 (36) 47 (37) 48 VPO ( (38) 49 (39) 50 (42) 53 (43) 54 (44) 55 (45) 56 (46) 57 (47) 58 VPO (48 (49) 60 (50) 61 (51) 62 SAA7111 (31) 42 (17) 26 (27) 38 (30) 41 (60) 3 (28) 39 (29) 40 (53) 64 (14) 23 (20) 29 (21) 30 ...
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... Philips Semiconductors Video Input Processor (VIP C-BUS DESCRIPTION 2 16.1 I C-bus format Table 6 Write procedure S SLAVE ADDRESS W ACK(s) Table 7 Read procedure (combined format) S SLAVE ADDRESS W Sr SLAVE ADDRESS R 2 Table 8 Description of I C-bus format CODE S START condition Sr repeated START condition Slave address W ...
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... Philips Semiconductors Video Input Processor (VIP) 2 Table 9 I C-bus receiver/transmitter overview SLAVE ADDRESS REGISTER SUB- FUNCTION ADDR. Chip version 00 Reserved 01 Analog input control 1 02 Analog input control 2 03 Analog input control 3 04 Analog input control 4 05 Horizontal sync start 06 Horizontal sync stop ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2 UBADDRESS Table 10 Chip version SA 00 FUNCTION (1) Chip version in read mode Note 2 1. The I C-bus subaddress 00 has to be initialized with 0 prior to reading it. 16.2 UBADDRESS Table 11 Analog control 1 (mode select; see Figs 28 to 35 D0; note 1 ...
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... Philips Semiconductors Video Input Processor (VIP) AI22 handbook, halfpage AD2 AI21 AI12 AD1 AI11 Fig.28 Mode 0; CVBS (automatic gain). AI22 handbook, halfpage AD2 AI21 AI12 AD1 AI11 Fig.30 Mode 2; CVBS (automatic gain). AI22 handbook, halfpage AD2 AI21 AI12 AD1 AI11 Fig.32 Mode 4 Y (automatic gain (gain channel 2 fixed to GAI1 level) ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2 UBADDRESS Table 14 Analog control 2 (AICO2) FUNCTION Static gain control channel 1 (GAI18) Sign bit of gain control Static gain control channel 2 (GAI28) Sign bit of gain control Gain control fix (GAFIX) Automatic gain controlled by MODE 1 and MODE 0 ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2 UBADDRESS Table 16 Gain control analog (AIC04); static gain control channel 2 GAI2 SA 05 SIGN BIT \DECIMAL GAIN (SA 03, D1) VALUE (dB) GAI28 0.... 5.98 0 ....255 0 0 256.... 0 1 ....511 5.98 1 16.2 UBADDRESS Table 17 Horizontal sync begin SA 06 DELAY TIME ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2 UBADDRESS Table 19 Sync control FUNCTION Vertical noise reduction (VNOI) Normal mode Searching mode Free running mode Vertical noise reduction bypassed Horizontal PLL (HPLL) PLL closed PLL open, horizontal frequency fixed ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2 UBADDRESS Table 20 Luminance control FUNCTION Aperture factor (APER) Aperture factor = 0 Aperture factor = 0.25 Aperture factor = 0.5 Aperture factor = 1.0 Update time interval for AGC value (UPTCV) Horizontal update (once per line) Vertical update (once per field) Vertical blanking luminance bypass (VBLB ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS Table 21 Luminance brightness control BRIG7 to BRIG0 SA 0A OFFSET BRIG7 255 (bright) 1 128 (CCIR level (dark) 0 16.2. UBADDRESS Table 22 Luminance contrast control CONT7 to CONT0 SA 0B GAIN CONT7 1.999 (maximum) 0 1.109 (CCIR level (luminance off) ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS Table 25 Chrominance control SA 0E FUNCTION Chroma bandwidth (CHBW0 and CHBW1) Small bandwidth ( 620 kHz) Nominal bandwidth ( 800 kHz) Medium bandwidth ( 920 kHz) Wide bandwidth ( 1000 kHz) Fast colour time constant (FCTC) Nominal time constant Fast time constant Disable chroma comb fi ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS Table 26 Format/delay control SA 10 LUMINANCE DELAY COMPENSATION (STEPS IN 2/LLC) 4... ...0... ...3 Table 27 VREF pulse position and length VRLN SA 10 (D3) VREF 525 LINES VRLN Length Line number first Field 1 19 (22) Field 2 282 (285) Note 1 ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS Table 30 Output control FUNCTION Colour on (COLO) Automatic colour killer Colour forced on Decoder VIP bypassed (VIPB) DMSD data to YUV output ADC data to YUV output; dependent on mode settings Output enable horizontal/vertical sync (OEHV) HS, HREF, VREF and VS high impedance inputs ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS Table 31 Output control FUNCTION Analog test select (AOSL) AOUT connected to internal test point 1 AOUT connected to input AD1 AOUT connected to input AD2 AOUT connected to internal test point 2 Dithering (noise shaping) control (DIT) Dithering off ...
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... Philips Semiconductors Video Input Processor (VIP) 16.2. UBADDRESS READ Table 32 Line-21 text slicer status C-BUS STATUS BIT NAME F1RDY new data on field 1 has been acquired (for asynchronous reading); active HIGH F1VAL Line-21 of field 1 carries valid data; active HIGH F2RDY new data on fi ...
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... Philips Semiconductors Video Input Processor (VIP) 17 FILTER CURVES 17.1 Anti-alias filter curve 6 handbook, full pagewidth V (dB 17.2 Luminance filter curves 18 handbook, full pagewidth V Y (dB (1) = 43H; (2) = 53H; (3) = 63H; (4) = 73H. Fig.37 Luminance control SA 09H, 4.43 MHz Trap/CVBS mode, prefilter on and different aperture band-pass centre frequencies ...
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... Philips Semiconductors Video Input Processor (VIP) 18 handbook, full pagewidth V Y (dB (1) = 40H; (2) = 41H; (3) = 42H; (4) = 43H. Fig.38 Luminance control SA 09H, 4.43 MHz Trap/CVBS mode, prefilter on and different aperture factors. 18 handbook, full pagewidth V Y (dB) 6 (1) (2) (4) ( (1) = 03H; (2) = 13H; (3) = 23H; (4) = 33H. ...
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... Philips Semiconductors Video Input Processor (VIP) 18 handbook, full pagewidth V Y (dB (1) = C0H; (2) = C1H; (3) = C2H; (4) = C3H. Fig.40 Luminance control SA 09H, Y/C mode, prefilter on and different aperture factors. 18 handbook, full pagewidth V Y (dB (1) = 80H; (2) = 81H; (3) = 82H; (4) = 83H. Fig.41 Luminance control SA 09H, Y/C mode, prefilter off and different aperture factors. ...
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... Philips Semiconductors Video Input Processor (VIP) 18 handbook, full pagewidth V Y (dB) 6 (1) (2) (4) ( (1) = 43H; (2) = 53H; (3) = 63H; (4) = 73H. Fig.42 Luminance control SA 09H, 3.58 MHz Trap/CVBS mode, prefilter on and different aperture band-pass centre frequencies. 18 handbook, full pagewidth V Y (dB) 6 (1) (2) (3) ( ...
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... Philips Semiconductors Video Input Processor (VIP) 18 handbook, full pagewidth V Y (dB) 6 (1) (2) (4) ( (1) = 03H; (2) = 13H; (3) = 23H; (4) = 33H. Fig.44 Luminance control SA 09H, 3.58 MHz Trap/CVBS mode, prefilter off and different aperture band-pass centre frequencies. 1998 May Product specification ...
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... Philips Semiconductors Video Input Processor (VIP) 17.3 Chrominance filter curves 6 handbook, full pagewidth V (dB 0.54 Transfer characteristics of the chroma low-pass dependent on CHBW[1:0] settings. (1) CHBW [ 00; (2) CHBW [ 01; (3) CHBW [ 10; (4) CHBW [ 11 C-BUS START SET-UP The given values force the following behaviour of the SAA7111: – ...
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... Philips Semiconductors Video Input Processor (VIP) 2 Table 36 I C-bus start set-up values SUB FUNCTION (HEX) 00 chip version 01 reserved 02 analog input control 1 03 analog input control 2 04 analog input control 3 05 analog input control 4 06 horizontal sync start 07 horizontal sync stop 08 sync control ...
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... Philips Semiconductors Video Input Processor (VIP) 19 PACKAGE OUTLINES PLCC68: plastic leaded chip carrier; 68 leads pin 1 index DIMENSIONS (millimetre dimensions are derived from the original inch dimensions UNIT min. max. 4.57 0.53 mm 0.51 0.25 3.30 4.19 0.33 0.180 0.021 inches ...
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... Philips Semiconductors Video Input Processor (VIP) QFP64: plastic quad flat package; 64 leads (lead length 1.6 mm); body 2 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 2.75 mm 3.00 0.25 0.10 2.55 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... Philips Semiconductors Video Input Processor (VIP) 20 SOLDERING 20.1 Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities ...
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... Philips Semiconductors Video Input Processor (VIP) 21 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains fi ...
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... Philips Semiconductors Video Input Processor (VIP) 1998 May 15 NOTES 61 Product specification SAA7111 ...
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... Philips Semiconductors Video Input Processor (VIP) 1998 May 15 NOTES 62 Product specification SAA7111 ...
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... Philips Semiconductors Video Input Processor (VIP) 1998 May 15 NOTES 63 Product specification SAA7111 ...
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... Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel ...