AD9853AS Analog Devices, AD9853AS Datasheet
AD9853AS
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AD9853AS Summary of contents
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... CLOCK 6 REF CLOCK IN REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...
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AD9853–SPECIFICATIONS Parameter REF CLOCK INPUT CHARACTERISTICS Frequency Range 6 REFCLK Disabled (+3.3 V Supply) 6 REFCLK Enabled (+3.3 V Supply) 6 REFCLK Disabled (+5 V Supply) 6 REFCLK Enabled (+5 V Supply) Duty Cycle Input Capacitance Input Impedance DAC OUTPUT ...
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... Model AD9853AS – +85 C Metric Quad Flatpack S-44A CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. ...
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AD9853 PIN FUNCTION DESCRIPTIONS Pin # Pin Name Pin Function 10, 36, 39, 44 DGND Digital Ground 2, 8, 37, 40, 43 DVDD Digital Supply Voltage 3 Control Bus Clock Bit Clock for Control Bus Data 4 ...
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Modulation Encoding Format Output Carrier Frequency Range Serial Input Data Rate Pulse-Shaping FIR Filter Interpolation Range Maximum Reference Clock Frequency 6 REFCLK R-S FEC I/Q Channel Spectrum Preamble Insertion Randomizer *In FSK mode, F0:F1 are direct DDS Cosine output. The ...
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AD9853 Register Address (Note 00h MSB Value of K (Message Length in Bytes) for Reed-Solomon Encoder, where 16 01h MSB The Number of Correctable Byte Errors (t) for the Reed-Solomon Encoder, where 0 For ...
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Modulated Output Spectrum with 3.3 V Supply, 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 START 0Hz 6MHz/ Figure 1. QPSK, 320 kb/ –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 START 0Hz ...
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AD9853 Modulated Output Spectrum with 5 V Supply, 0 RBW = 3kHz –10 VBW = 3kHz SWT = 22.5s –20 RF ATT = 10dB REF LVL = –20dBm –30 –40 –50 –60 –70 –80 –90 –10 0 START 0Hz 8MHz/ ...
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Output Phase Noise Plots MHz OUT 0 RBW = 30Hz –10 VBW = 30Hz SWT = 56s RF ATT = 20dB –20 REF LVL = –1dBm –30 –40 –50 –60 –70 –80 –90 –100 CENTER 40Hz 1kHz/ ...
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AD9853 Typical Plots of Eye Diagrams and Constellations CF 42MHz MEAS SIGNAL REF LVL –7dBm 1.2 –1.2 0 SYMBOLS Figure 16. QPSK Modulation CF 42MHz MEAS SIGNAL REF LVL SR 1.28MHz CONSTELLATION –7dBm 1.2 –1.2 –1.5 REAL Figure 17. QPSK ...
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BIT RATE >2Mb/s 85 VCC = +5V CONTINUOUS MODE 110 115 120 125 130 135 140 145 150 155 160 165 MAX CLOCK RATE – MHz Figure 20. Max CLK Rate vs. Ambient Temperature (To ...
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AD9853 FRAME STRUCTURE: MIN T T ENABLE X NOTE: DATA RATE MUST BE PRECISELY SYNCHRONIZED WITH RISING EDGE OF T DATA INTERNAL CODE- WORD STRUCTURE DATA PACKET = K BYTES AT ...
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WRITE DEVICE ADDRESS A(S) S LSB = 0 READ S DEVICE ADDRESS A( START CONDITION P = STOP CONDITION Figure 27. Serial Control Bus—Read and Write Sequences MSB 0 0 Figure 28. Serial Control Bus—8-Bit Device Address Detail ...
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AD9853 t RL RESET CONTROL BUS NOTE 1 T ENABLE X DAC OUT t : MINIMUM RESET LOW TIME = 10ns DATA LATENCY = 6 SYMBOLS DL NOTE 1. DURING THIS INTERVAL ALL CONTROL BUS REGISTERS MUST ...
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THEORY OF OPERATION The AD9853 is a highly integrated modulator function that has been specifically designed to meet the requirements of the HFC upstream function for both interoperable and proprietary system implementations. The AD8320 is a companion cable driver amplifier ...
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AD9853 receive end. The values actually programmed on the serial con- trol bus are “K” and “t,” which will define N as shown in the above code-word structure equation. As can be seen from the code-word structure equation, two check ...
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The transmitter and receiver must use the same symbol deriva- tion scheme. Differential encoding in the AD9853 occurs ...
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AD9853 SQUARE-ROOT RAISED COSINE (SRRC) FIR FILTER COMPUTE AND PLOT SRRC FILTER COEFFICIENTS: 1 TAPS – tap – tap := 0..TAPS – tap FreqScale h(t) := SRRC(f) cos(2 f t)df ...
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The frequency response, H(f CIC filter is found by evalu- j(2 f/R) ating H( where f is relative ...
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AD9853 MODIFICATION OF SQUARE-ROOT RAISED COSINE (SRRC) FIR FILTER RESPONSE TO COMPENSATE FOR CASCADED INTEGRATOR-COMB (CIC) FILTER RESPONSE COMPUTE SRRC FILTER COEFFICIENTS: TAPS – tap – tap := 0..TAPS – tap FreqScale 2 BW ...
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RESPONSE OF NORMAL SRRC, NORMAL SRRC + CIC, AND COMPENSATED SRRC + CIC 0 –20 FIR(f) SYSuncomp(f) SYScomp(f) –40 –60 0 0.2 2 –10 FIR(f) SYSuncomp(f) SYScomp(f) –22 –34 0.1 0 GLOBAL DECLARATIONS CONSTANTS: 0.5 ...EXCESS BANDWIDTH FACTOR FOR SRRC ...
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AD9853 TAP I FIR 2 SYMBOL 1 CLOCK I & ENCODER TAP Q FIR 12 Figure 36. Block Diagram of AD9853 Data Path and Clock Stages The goal of interpolation ...
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These register widths have been chosen to accommodate the highest values of R for each interpolator. When values of R are chosen that are less than the maximum value, then data will accumulate only in the lesser significant bits of ...
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AD9853 Table IV. Interpolator #1 Rate Nominal Change Scale Alternate Factor Value Nominal Scale (R) (R-1) Gain Value 03 02 1.688 1.000 1.953 1.688 1.340 ...
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Q 10 (01) 00 (00) a. QPSK Symbol Mapping Q 1011 1001 1110 (0111) (0110) (1101) 1010 1000 1100 (0101) (0100) (1100) 0001 0100 0000 (0010) (1000) (0000) 0011 0010 0101 (0011) (0001) (1010) b. D16-QAM Symbol Mapping REV. C ...
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AD9853 around the constellation has simply been reversed. This effect also holds true for the 16-QAM and D16-QAM constellations shown in the respective I COS – Q SIN mappings shown in Figure 37. DIRECT DIGITAL SYNTHESIZER FUNCTION The direct digital ...
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REFERENCE CLOCK MULTIPLIER Due to the fact that the AD9853 is a DDS-based modulator, a relatively high frequency system clock is required. For DDS applications the carrier is typically limited to about 40 For a 65 MHz ...
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AD9853 LATCH +5V "CENTRONICS" PRINT PORT U3 R8 CONN. 74ACT573 3.9k C36CRPX 9 FEC LATCH BUSCLK 5D TXEN 3 5 BUSDAT 4D TSTATE 4 4 RESET 3D RESET 5 3 FEC ...
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Layer 1 (Top) – Signal Routing and Ground Plane b. Layer 2 – Ground Plane Figure 40. PCB Layout Patterns for the Four-Layer AD9853-xxPCB Evaluation Board REV Layer 3 – DUT + and +12 V ...
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AD9853 Plots of typical output spectrum from the AD9853-45PCB evaluation board (conditions: DUT supply voltage = +3.3 V, QPSK modulation, 2.048 Mb/s, 20.48 MHz ext. REFCLK, 6 REFCLK enabled, SRRC filter function 0.25, 50 MHz low-pass filter). ATTEN ...
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REV. C OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Lead Metric Quad Flatpack (MQFP) (S-44A) 0.530 (13.45) SQ 0.510 (12.95) 0.096 (2.45) 0.398 (10.10) MAX SQ 0.390 (9.90) 0.041 (1.03) 0.029 (0.73 SEATING PLANE TOP VIEW (PINS ...