DS1497 Dallas Semiconductor, DS1497 Datasheet
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DS1497
Related parts for DS1497
DS1497 Summary of contents
Page 1
... DS1495 28-Pin DIP (600 mil SQW STBY IRQ RESET XRAM RTC DS1497 28-Pin Encapsulated Package (720 mil) 020894 1/19 ...
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... DS1495/DS1497 PIN DESCRIPTIONS – Bus operational power is supplied to the part DD SS via these pins. The voltage level present on these pins should be monitored to transition between operational power and battery power. D0-D7 – Data Bus (bidirectional): Data is written into the device from the data bus if either XRAM or RTC is asserted during a write cycle at the rising edge pulse ...
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... module is switched over to an internal power source in L the case of the DS1497 external battery con- nected to the V and BGND pins in the case of the BAT DS1495 and DS1495S, so that power is not interrupted to timekeeping and nonvolatile RAM functions. ...
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... USER NONVOLATILE RAM - RTC The 50 user nonvolatile RAM bytes are not dedicated to any special function within the DS1495/DS1497. They can be used by the application program as nonvolatile memory and are fully available during the update cycle. This memory is directly accessible in the RTC section. ...
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... DS149X BLOCK DIAGRAM Figure 1 DS1495/DS1497 DECODER REGISTER INDEX 020894 5/19 ...
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... DS1495/DS1497 REAL TIME CLOCK RAM MAP Figure 2 RTC INDIRECT ADDRESS REGISTER RTC +1 RTC DATA REGISTER INDIRECT ADDRESS 00 14–BYTES RTC 13 14 50–BYTES USER RAM 63 EXTENDED RAM ADDRESS MAP Figure 3 XRAM THRU XRAM + 1F XRAM + 20 XRAM + 21 THRU XRAM + 3F 020894 6/ ...
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... IRQ pin is being driven low. Determination that the RTC initiated an interrupt is accomplished by read- ing Register C. A logic one in bit 7 (IRQF bit) indicates that one or more interrupts have been initiated by the DS1495/DS1497. The act of reading Register C clears all active flag bits and the IRQF bit. DS1495/DS1497 020894 7/19 ...
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... DS1495/DS1497 OSCILLATOR CONTROL BITS When the DS1495/DS1497 is shipped from the factory, the internal oscillator is turned off. This feature prevents the lithium battery from being used until it is installed in a system. A pattern of 010 in bits 4 through 6 of Register A will turn the oscillator on and enable the countdown chain ...
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... UPDATE CYCLE The DS1495/DS1497 executes an update cycle once per second regardless of the SET bit in Register B. When the SET bit in Register B is set to one, the user copy of the double buffered time, calendar, and alarm bytes is frozen and will not update as the time incre- ments ...
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... When the AIE bit is set to zero, the AF bit does not initiate the IRQ signal. The internal functions of the DS1495/DS1497 do not affect the AIE bit but is cleared by RESET. UIE - The Update Ended Interrupt Enable (UIE) bit is a read/write bit that enables the Update Ended Flag (UF) bit in Register C to assert IRQ ...
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... RTC data and RAM data are question- able. BIT 6 THROUGH BIT 0 – The remaining bits of Register D are reserved and not usable. They cannot be written and, when read, they will always read zero. DS1495/DS1497 LSB BIT 2 BIT 1 BIT 0 0 ...
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... Oscillator Startup From Software Enable Via DV Bits IRQ Release from RD High IRQ Release from RESET Low 020894 12/19 -0.3V to +7.0V V – 500 mW DS1497: – +70 C DS1495: – +125 260 C for 10 seconds SYM MIN MAX V 4 ...
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... IRQ RELEASE DELAY RD V HIGH RESET V HIGH IRQ t IRDS OSCILLATOR START-UP SQW Pin WR V DV0–2 NOTE: Timing assumes RS3-0 Bits = 0011, minimum t t RWL t IRR t RC HIGH . PI DS1495/DS1497 020894 13/19 ...
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... DS1495/DS1497 BUS TIMING PARAMETER SYM Cycle Time t CYC Pulse Width, RD/WR Low PW RWL Signal Rise and Fall Time, RTC XRAM, RD, WR Address Hold Time t AH Address Setup Time Before RD t ARS Address Setup Time Before WR t AWS RTC/XRAM Select Setup Time Be- ...
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... RWL t t DSW VALID VALID t DDR RWL t DHR MIN TYP MAX 0 150 300 < 4. >4.0V 10 MIN TYP MAX UNITS 12 12 DS1495/DS1497 AH t DHW UNITS NOTES years ( NOTES pF pF 020894 15/19 ...
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... C Clock Accuracy for (DS1497 only) Clock Accuracy Temperature Coefficient (DS1497) Clock Temperature Coefficient t Turnover Temperature (DS1497 only) Chip Enable Threshold (DS1497 only) CE POWER–UP CONDITION CE 4.5V 4.25V 4. POWER FAIL NOTE internal signal generated by the power switching reference in the DS149X products. ...
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... DS1495 28–PIN DIP DS1495/DS1497 PKG 28–PIN DIM MIN A IN. 1.445 36.70 B IN. 0.530 MM 13.46 C IN. 0.140 MM 3.56 D IN. 0.600 MM 15.24 E IN. 0.015 MM 0.38 F IN. 0.120 MM 3.05 G IN. 0.090 MM 2.29 H IN. 0.625 C MM 15.88 J IN. 0.008 IN. 0.015 MM 0.38 MAX 1.470 37.34 0.550 13.97 0.160 4.06 0.625 15.88 0.040 1.02 0.145 3 ...
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... DS1495/DS1497 DS1495S 28–PIN SOIC 0–8 deg. typ 020894 18/19 PKG 28-PIN DIM MIN MAX A IN. 0.706 0.728 MM 17.93 18.49 B IN. 0.338 0.350 MM 8.58 8.89 C IN. 0.086 0.110 MM 2.18 2.79 D IN. 0.020 0.050 MM 0.58 1.27 E IN. 0.002 0.014 MM 0.05 0.36 F IN. 0.090 0.124 MM 2.29 3.15 0.050 BSC G IN IN. 0.460 ...
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... DS1497 28–PIN 720 MIL FLUSH ENCAPSULATED EQUAL SPACES AT .100 .010 TNA PKG DIM MIN A IN. 1.520 MM 38.61 B IN. 0.695 MM 17. IN. 0.350 MM 8.89 D IN. 0.100 MM 2.54 E IN. 0.015 MM 0.38 F IN. 0.110 MM 2. IN. 0.090 MM 2.29 H IN. 0.590 F MM 14. IN. 0.008 MM 0.20 K IN. ...