CY62128BLL-70ZXC Cypress Semiconductor Corporation., CY62128BLL-70ZXC Datasheet

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CY62128BLL-70ZXC

Manufacturer Part Number
CY62128BLL-70ZXC
Description
CY62128BLL-70ZXC128K x 8 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Cypress Semiconductor Corporation
Document #: 38-05300 Rev. *C
Features
Note:
Logic Block Diagram
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
• Temperature Ranges
• 4.5V – 5.5V operation
• CMOS for optimum speed/power
• Low active power
• Low standby power
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
(70 ns, LL version, Commercial, Industrial)
— 82.5 mW (max.) (15 mA)
(70 ns, LL version, Commercial, Industrial)
— 110 µW (max.) (15 µA)
WE
CE 1
CE 2
OE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
1
, CE
2
, and OE options
INPUT BUFFER
512x 256x 8
3901 North First Street
DECODER
COLUMN
ARRAY
POWER
DOWN
Functional Description
The CY62128B is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE
an active HIGH Chip Enable (CE
Enable (OE), and three-state drivers. This device has an
automatic
consumption by more than 75% when deselected.
Writing to the device is accomplished by taking Chip Enable
One (CE
Enable Two (CE
through I/O
address pins (A
Reading from the device is accomplished by taking Chip
Enable One (CE
Write Enable (WE) and Chip Enable Two (CE
these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH or CE
during a write operation (CE
The CY62128B is available in a standard 450-mil-wide SOIC,
32-pin TSOP type I and STSOP packages.
1
) and Write Enable (WE) inputs LOW and Chip
7
) is then written into the location specified on the
2
power-down
LOW), the outputs are disabled (OE HIGH), or
San Jose
0
2
1
) input HIGH. Data on the eight I/O pins (I/O
) and Output Enable (OE) LOW while forcing
through A
128K x 8 Static RAM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
,
CA 95134
16
1
feature
LOW, CE
).
[1]
0
through I/O
Revised February 14, 2005
2
), an active LOW Output
that
2
HIGH, and WE LOW).
7
reduces
CY62128B
) are placed in a
2
) HIGH. Under
408-943-2600
MoBL
power
1
),
0
1

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CY62128BLL-70ZXC Summary of contents

Page 1

Features • Temperature Ranges — Commercial: 0°C to 70°C — Industrial: –40°C to 85°C — Automotive: –40°C to 125°C • 4.5V – 5.5V operation • CMOS for optimum speed/power • Low active power (70 ns, LL version, Commercial, Industrial) — ...

Page 2

... Product Portfolio Product CY62128BLL Industrial Industrial Automotive Pin Configurations Reverse TSOP Top View (not to scale ...

Page 3

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage Relative GND CC DC Voltage ...

Page 4

Capacitance Parameter Description C Input Capacitance IN C Output Capacitance OUT \ AC Test Loads and Waveforms R1 1800 Ω 5V OUTPUT OUTPUT R2 100 pF 990 Ω INCLUDING JIG AND SCOPE (a) Equivalent to: THÉVENIN EQUIVALENT 639 Ω ...

Page 5

Switching Characteristics Over the Operating Range Parameter READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid, CE ACE LOW ...

Page 6

Switching Waveforms (continued) [13, 14] Read Cycle No. 2 (OE Controlled) ADDRESS HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT Write Cycle No Controlled ADDRESS ...

Page 7

Switching Waveforms (continued) Write Cycle No. 2 (WE Controlled, OE HIGH During Write) ADDRESS DATA I/O 17 NOTE t HZOE Write Cycle No.3 (WE Controlled, OE LOW) ADDRESS ...

Page 8

... CY62128BLL-55SI CY62128BLL-55SXI CY62128BLL-55SC CY62128BLL-55SXC CY62128BLL-55ZI CY62128BLL-55ZXI CY62128BLL-55ZAI CY62128BLL-55ZAXI CY62128BLL-55ZRI 70 CY62128BLL-70SI CY62128BLL-70SXI CY62128BLL-70SC CY62128BLL-70SXC CY62128BLL-70SE CY62128BLL-70SXE CY62128BLL-70ZI CY62128BLL-70ZXI CY62128BLL-70ZC CY62128BLL-70ZXC CY62128BLL-70ZE CY62128BLL-70ZXE CY62128BLL-70ZAI CY62128BLL-70ZAXI CY62128BLL-70ZAE CY62128BLL-70ZAXE CY62128BLL-70ZRXE Document #: 38-05300 Rev. *C I/O –I/O Mode 0 7 Power-down Power-down Read Write Selected, Outputs Disabled Package Name ...

Page 9

Package Diagrams 16 17 0.793[20.142] 0.817[20.751] 0.101[2.565] 0.111[2.819] 0.050[1.270] BSC. 0.014[0.355] 0.020[0.508] 32-Lead Thin Small Outline Package Type I (8x20 mm) Z32 Document #: 38-05300 Rev. *C 32-Lead (450 MIL) Molded SOIC S34 1 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 32 0.006[0.152] ...

Page 10

... Shrunk Thin Small Outline Package (8x13.4 mm) ZA32 32-Lead Reverse Thin Small Outline Package ZR32 MoBL is a registered trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05300 Rev. *C © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

Page 11

... Changed from Spec number: 38-00524 to 38-05300 JUI Changed and added CE 1 Removed these part numbers from Ordering Information table: CY62128BLL-55ZC, CY62128BLL-55ZAC, CY62128BLL-55ZRC, CY62128BLL-70ZAC, CY62128BLL-70ZRI, CY62128BLL-70ZRC Added Thermal Resistance table Added Automotive product information Added Pb-free package information CY62128B MoBL ≤ 0.3V in Data Retention Characteristics table ...

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