CY7C1019B-10VC Cypress Semiconductor Corporation., CY7C1019B-10VC Datasheet

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CY7C1019B-10VC

Manufacturer Part Number
CY7C1019B-10VC
Description
CY7C1019B-10VC128K x 8 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Cypress Semiconductor Corporation
Document #: 38-05026 Rev. *A
Features
Functional Description
The CY7C1019B/10191B is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers. This
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
WE
CE
OE
• High speed
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Functionally equivalent to CY7C1019
ogic Block Diagram
— t
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
AA
= 10, 12, 15 ns
INPUT BUFFER
512 x 256 x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
3901 North First Street
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
fied on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019B/10191B is available in standard 32-pin
TSOP Type II and 400-mil-wide SOJ packages. Customers
should use part number CY7C10191B when ordering parts
with 10 ns t
t
AA
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
.
0
through I/O
San Jose
AA
, and CY7C1019B when ordering 12 and 15 ns
V
I/O
I/O
V
I/O
I/O
WE
CE
CC
A
A
A
A
A
A
A
A
128K x 8 Static RAM
SS
7
0
1
2
0
1
2
3
4
5
6
7
Pin Configurations
3
) is then written into the location speci-
SOJ
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Top View
CA 95134
through A
0
/ TSOPII
through I/O
Revised August 13, 2002
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CY7C10191B
CY7C1019B/
16
).
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
7
SS
CC
) are placed in a
16
15
14
13
12
11
10
9
8
7
6
5
4
408-943-2600

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CY7C1019B-10VC Summary of contents

Page 1

... North First Street • CY7C1019B/ CY7C10191B 128K x 8 Static RAM through I then written into the location speci- 7 through through I/O ) are placed and CY7C1019B when ordering 12 and Pin Configurations / TSOPII SOJ Top View ...

Page 2

... IN IL MAX Max > V – 0.3V > V – 0.3V < 0.3V Test Conditions T = 25° MHz 5.0V CC CY7C1019B/ CY7C10191B 7C1019B-12 7C1019B-15 12 140 10 1 Ambient [2] Temperature 0°C to +70°C –40°C to +85°C 7C1019B-12 7C1019B-15 Min. Max. Min. 2.4 2.4 0.4 2 ...

Page 3

... Max less than less than t HZCE LZCE HZOE LZOE CY7C1019B/ CY7C10191B ALL INPUT PULSES 3.0V 90% 10 7C1019B-12 7C1019B-15 Min. Max. Min ...

Page 4

... CE > V – 0.3V > V – 0. DATA RETENTION MODE 3.0V V > CDR OHA t RC ACE t DOE LZOE 50 CY7C1019B/ CY7C10191B Conditions Min. + 0.5V 2 < 0.3V IN 200 3. DATA VALID t HZOE t HZCE DATA VALID t PD 50% Max. Unit V 300 HIGH ...

Page 5

... During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05026 Rev SCE SCE PWE t SD DATA VALID [12, 13 SCE PWE t SD DATA VALID IN CY7C1019B/ CY7C10191B Page ...

Page 6

... H Data Out Data High Z Ordering Information Speed (ns) Ordering Code 10 CY7C10191B-10VC 12 CY7C1019B-12VC CY7C1019B-12ZC 15 CY7C1019B-15VC CY7C1019B-15VI CY7C1019B-15ZC CY7C1019B-15ZI Document #: 38-05026 Rev. *A [13 SCE PWE HZWE –I/O Mode 0 7 Power-Down Power-Down Read Write Selected, Outputs Disabled Package Name V33 ...

Page 7

... Package Diagrams Document #: 38-05026 Rev. *A 32-Lead (400-Mil) Molded SOJ V33 CY7C1019B/ CY7C10191B 51-85033-A 51-85033-*B Page ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 32-Lead TSOP II ZS32 CY7C1019B/ CY7C10191B 51-85095 ...

Page 9

... Document Title: CY7C1019B/CY7C10191B 128K x 8 Static RAM Document Number: 38-05026 REV. ECN NO. Issue Date ** 109949 *A 116170 Document #: 38-05026 Rev. *A Orig. of Change 09/25/01 SZV 08/14/02 HGK CY7C1019B/ CY7C10191B Description of Change Change from Spec number: 38-01115 to 38-05026 1. SOJ (400-mil) package outline replacing incorrect SOJ package 2 ...

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