PM73487-PI PMC-Sierra Inc, PM73487-PI Datasheet

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PM73487-PI

Manufacturer Part Number
PM73487-PI
Description
622Mbps ATM traffic management device
Manufacturer
PMC-Sierra Inc
Datasheet

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Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
PM73487
QRT
622 Mbps ATM Traffic Management
Device
DATASHEET
Released
Issue 3: JUN 1999

Related parts for PM73487-PI

PM73487-PI Summary of contents

Page 1

... Released Datasheet PMC-980618 622 Mbps ATM Traffic Management PMC-Sierra, Inc. Issue 3 PM73487 QRT Device DATASHEET Released Issue 3: JUN 1999 PM73487 QRT 622 Mbps ATM Traffic Management Device ...

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... Intel Corporation trademark of PMC-Sierra, Inc. All other brand or product names are trademarks of their respective companies or organizations. U.S. Patents 5,557,607, 5,570,348, and 5,583,861 Copyright © 1998 PMC-Sierra, Inc. All Rights Reserved PM73487 QRT 622 Mbps ATM Traffic Management Device ...

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... This data sheet includes: registers added in B version of device: RX_QUEUE_ENGINE_TEST - bits 26:16 TX_QUEUE_ENGINE_TEST - bits 22:15 QUEUE_ENGINE_CONDITION_PRES_BIT S QUEUE_ENGINE_CONDITION_LATCH_B ITS QUEUE_ENGINE_INT_MASK RX_LOWER16_SCG_CONFIG RX_LOWER16_SCG_STATE RX_LOWER32_SCG_CONFIG RX_LOWER32_SCG_STATE RX_LOWER48_SCG_CONFIG RX_LOWER48_SCG_STATE TX_LOWER4_SCG_CONFIG TX_LOWER4_SCG_STATE TX_LOWER8_SCG_CONFIG TX_LOWER8_SCG_STATE TX_LOWER12_SCG_CONFIG TX_LOWER12_SCG_STATE Updated RX_SERVICE_TABLE June 1999 Production Release Version PM73487 QRT 622 Mbps ATM Traffic Management Device ...

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... Released Datasheet PMC-980618 PMC-Sierra, Inc. Issue 3 PM73487 QRT 622 Mbps ATM Traffic Management Device ...

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... Transmit Queue Service Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2.6.4 Transmit Resequencing Algorithm 2.6.5 Transmit Recovery Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2.6.6 Transmit Multicast Cell Background Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 2.6.7 Transmit Multicast Congestion Management 2.7 System Diagram of Internal QRT Blocks and External RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3 Fault Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT viii ...

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... Miscellaneous Timing Microprocessor Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.1 Microprocessor Ports Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 7.2 Microprocessor Ports Bit Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 7.2.1 REVISION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 7.2.2 RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 7.2.3 TEST_CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 7.2.4 SRAM_CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 7.2.5 SWITCH_CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 7.2.6 RAM BIST RESULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 7.2.7 MARKED_CELLS_COUNT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 7.2.8 CONDITION_PRES_BITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 7.2.9 CONDITION_LATCH_BITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT ix ...

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... Virtual Output Control RAM (VO_RAM) Summary 159 8.4.1 Transmit VO Control Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 8.4.2 Transmit SC Control Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 8.4.3 Transmit Multicast SC Control Block Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 8.5 Receive Switch Fabric Control RAM (RSF_CONTROL) Summary 167 8.5.1 RX_RSF_CONFIG (Internal Structure 167 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT x ...

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... Relationship Among the SYSCLK, SE_CLK, and the Switch Speed-Up Factor . . . . . . . . . . . . . 230 11.4.2 The Phase Aligner SE_CLK Frequency Constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230 11.4.3 The SYSCLK DRAM Refresh Constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230 11.4.4 Relationship Between ATM_CLK and SYSCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231 11.4.5 Relationship Between the PCLK and the SYSCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT xi ...

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... Figure 38. Steps to Send a Cell to the Fabric Figure 39. Receive Service Class (SC) Map Figure 40. Transmit Per-SCQ Linked List Figure 41. Transmit Maximum and Congested Threshold Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 42. Transmit Service Class (SC) Map (Per VO PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT xii ...

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... Figure 69. Virtual Output Control RAM (VO_RAM) Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 Figure 70. Boundary Scan Architecture 204 Figure 71. TAP Controller Finite State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 Figure 72. Connecting the QRT to Gigabit Ethernet Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227 Figure 73. Connecting the QRT to the RCMP-800 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT xiii ...

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... Table 37. VI_VPI_TABLE Entry if VPC_ENTRY = 175 Table 38. Service Order Control Block Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181 Table 39. Channel RAM (CH_RAM) Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 Table 40. Channel Control Block Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 Table 41. Multicast Control Block Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194 Table 42. AB_RAM Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT xiv ...

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... Table 45. Receive Cell Buffers SDRAM/SGRAM Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202 Table 46. Transmit Cell Buffers SDRAM/SGRAM Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 Table 47. Boundary Scan Pin Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208 Table 48. Prefixes and Associated Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232 Table 49. QRT RAM Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237 Table 50. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT xv ...

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... PMC-980618 Issue 3 Product Overview The PM73487 622 Mbps ATM Traffic Management Device (QRT ) is an advanced communica- tions device capable of supporting very large, high-performance ATM switching systems. The rich feature set of the QRT enables systems to offer many sophisticated network services. The QRT provides 622 Mbps UTOPIA (Level 1 or Level 2) access to switch fabrics composed of PM73488 5 Gbps ATM Switch Fabric Elements (QSEs) ...

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... Provides a UTOPIA Level 2 Multi-PHY (MPHY) 16-bit, 50 MHz interface. • Provides a 2-level priority servicing algorithm for high and low bandwidth UTOPIA PHY layer devices. • Provides a multiplexed address/data CPU interface. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT 2 ...

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... Receive UTOPIA Control SSRAM Transmit UTOPIA Figure 1. QRT System Block Diagram PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Receive Cell SDRAM 622 Mbps ATM To Switch Fabric Traffic Mgt Device (QRT) Host Interface PM73487 From Switch Fabric Transmit Cell SDRAM PM73487 QRT 3 ...

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... UTOPIA Level 2 interface and 4-nibble wide, 66 MHz switch fabric inter- faces, as shown in Figure 2 on page line rate, is used to support full throughput for many switch fabric configurations. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 5. A significant switch speed-up factor 1.6 times the PM73487 QRT 4 ...

Page 17

... Mbps ATM Traffic Management Device Input Cell SDRAM Receive Nibble Data QRT (PM73487) Transmit Nibble Data Transmit Feedback Output Cell SDRAM Figure 2. QRT System Overview UTOPIA Level 2 Multi-PHY Interface S/UNI-QUAD (PM5349) PM73487 QRT Multicast SRAM Receive QSE (PM73488) QRT (PM73487) 5 ...

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... Issue 3 Transmit Output QSE (PM73488) Transmit Output QSE 16 16 (PM73488) (PM73488) QSE 16 16 (PM73488) (PM73488) PM73487 QRT 622 Mbps ATM Traffic Management Device 622 Mbps QRT #1 (PM73487) Aggregate Transmit UTOPIA Level 2 QRT #8 622 Mbps (PM73487) Aggregate QRT #1 622 Mbps (PM73487) Aggregate ...

Page 19

... PMC-980618 Issue 3 1.5 5 Gbps to 20 Gbps Application Example - Seamless Growth This section illustrates the modularity of the QRT (PM73487) and QSE (PM73488) architecture Gbps system can immediately be created (as shown in upgraded to 10 Gbps (as shown in 8). Since all these systems are based on a single-stage switch fabric, the per-port cost for each sys- tem will remain the same ...

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... Released Datasheet PMC-980618 Issue 3 Eight 155 Mbps • Two QRTs (PM73487s) Interfaces Eight 155 Mbps • Two QRTs (PM73487s) Interfaces Figure 8. 20 Gbps ATM Switch Using 64 Dual S/UNIs, 32 QRTs, and 4 QSEs PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Port Card 1 • ...

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... Port Card - One QRT One UTOPIA Level 2 Interface QRT (PM73487 Figure 9. 5 Gbps to 160 Gbps Switches Modeled Using Only Two Cards PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Switch Card - Two QSEs x32 x32 QSE (PM73488 x32 x32 QSE (PM73488 PM73487 QRT 9 ...

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... QSEs in the middle stage switch cards. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Switch Card #17 Stage 3 QSE x2 x2 Switch Card #1 Switch Card #2 Switch Card #16 Figure 10. 5 Gbps ATM Switch PM73487 QRT 622 Mbps Port Card #1 Tx Output 622 Mbps Port Card #8 Tx Output 10 ...

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... Stage 3 QSE x2 x2 Switch Card #1 Switch Card #18 Stage 3 QSE x2 x2 Switch Card #2 Switch Card #16 Figure 11. 10 Gbps ATM Switch PM73487 QRT 622 Mbps Port Card #1 Tx Output 622 Mbps Port Card #8 Tx Output 622 Mbps Port Card #9 Tx Output 622 Mbps ...

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... Switch Card #18 Stage 3 QSE x2 x2 Switch Card #19 Stage 3 QSE x2 x2 Switch Card #2 Switch Card #16 Figure 12. 15 Gbps ATM Switch PM73487 QRT 622 Mbps Port Card #1 Tx Output 622 Mbps Port Card #8 Tx Output 622 Mbps Port Card #9 Tx Output 622 Mbps ...

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... Switch Card #19 Stage 3 QSE x2 x2 Switch Card #2 Switch Card #20 Stage 3 QSE x2 x2 Switch Card #16 Figure 13. 20 Gbps ATM Switch PM73487 QRT 622 Mbps Port Card #1 Tx Output 622 Mbps Port Card #8 Tx Output 622 Mbps Port Card #9 Tx Output 622 Mbps ...

Page 26

... That is, the switch fabric is run at a rate that is effectively 1.6 times faster than the line rate. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Receive Cell SDRAM QRT (PM73487) Transmit Cell SDRAM Figure 14. QRT System Overview PM73487 QRT To QSE Host Interface From QSE 14 ...

Page 27

... The QRT host processor interface allows connection of a microprocessor through a multiplexed 32-bit address/data bus. The suggested microprocessor for this interface is the Intel i960 microprocessor has direct access to all of the QRT control registers. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT . The ® 15 ...

Page 28

... Mbps ATM Traffic Management Device 4 zeros 4 ones 4 zeros. 4 ones 4 zeros. Tseho PRES. 4 zeros 1 one. Figure 15. SE_SOC Encodings Mode Data1 Data0 Inversion1 Data2 Inversion2 Code Ext 0 4 ones Figure 16. BP_ACK Encodings PM73487 QRT 5 zeros 4 ones 4 zeros. Tsesu 5 zeros 4 zeros 4 zeros 4 ones 16 ...

Page 29

... RX_CELL_START Low Clock Cycle Clock Cycle Figure 17. QRT Cell-Level Timing PM73487 QRT Description Backpressure information. This signal is present each cell time, regardless of whether a cell was transmit- ted or not (on that link). This signal is withheld if any problem is detected on the input port. ...

Page 30

... When the cell is selected for transmission by the transmit-side scheduler removed from the trans- mit cell buffer DRAM and processed by the transmit multicast/header mapper for corresponding header translation and distribution. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “RX_CELL_START_ALIGN (Inter- Figure 18 on page 19): PM73487 QRT 18 ...

Page 31

... Receive SDRAM Controller Receive Switch Cell Buffer Receive Queue Controller Transmit Queue Controller Transmit Switch Cell Buffer Transmit SDRAM Controller Transmit SDRAM Cell Buffer Figure 18. QRT Data Flow Diagram PM73487 QRT Data to QSE Feedback from QSE Feedback to QSE Data from QSE 19 ...

Page 32

... PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device QRT polls PHYs to determine if they have cells. Data QRT Address (PM73487) Cell Available QRT polls PHYs to determine if they can accept cells. Data QRT Address (PM73487) Cell Available PM73487 QRT To Switch Fabric From Switch Fabric 20 ...

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... PM73487 QRT ...

Page 34

... PM73487 QRT ...

Page 35

... It will get the entire cell time bandwidth simply because there are no other phys to compete with. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “UT_PRIORITY” on page PM73487 QRT 119). 23 ...

Page 36

... UTOPIA_CONFIG(7) register. If the configuration bit is set to 0, the UTOPIA inserts a value of FFFFh in the HEC/UDF field. The transmit UTOPIA does not calculate the HEC for outgoing cells. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 117) configure PM73487 QRT 24 ...

Page 37

... Mbps ATM Traffic Management Device “VCI_TABLE” on page 176) to generate a channel number 176) is just a pointer to the VCI_TABLE, and the Channel Number VCI VCI_TABLE (one table per VP) Figure 25. VCC Channel Lookup PM73487 QRT “VI_VPI_TABLE” on “VCI_BITS” on page Channel Control Block (CCB) Connection Table 25 ...

Page 38

... Released Datasheet PMC-980618 Issue 3 Figure 26 shows the mapping for VPCs. Channel Number VI_VPI_TABL PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Figure 26. VPC Channel Lookup PM73487 QRT Channel Control Block (CCB) Connection Table 26 ...

Page 39

... Figure 28. Channel Linked List – a New Cell Arrives Per-VC Linked List Channel Head Tail Figure 29. Channel Linked List – a Cell Is Sent to the Fabric PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Figure 27. Channel Linked List PM73487 QRT Link Link Link Link Link Link Link Link ...

Page 40

... Figure 31. Receive Channel Ring after Channel_A Becomes Run-Limited PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Figure 33 on page 29 show the operation of the receive chan- Channel_A Channel_E Channel_D Figure 30. Receive Channel Ring Channel_B Channel_E Channel_D PM73487 QRT 34) and sometimes re-added to Channel_B Channel_C Channel_C 28 ...

Page 41

... EPD operation. Per Channel Per Device (DIR) Figure 34. Receive Congestion Limits PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Channel_B Channel_E Channel_C Channel_D Channel_B Channel_C Channel_E Channel_D 184) there are bits that enable EPD, CLP- Per Service Class (SC) PM73487 QRT Channel_A 29 ...

Page 42

... Drop these frames Always send the last cell of each Time Cells are arriving at a rate greater than the rate at which they are being played out. PM73487 QRT Tail drop this frame = End-Of-Frame (EOF) cell Tail drop this frame = End-Of-Frame (EOF) cell ...

Page 43

... PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device EFCI Codepoints Set From Here To Here Time Figure 37. EFCI Operation Read from ring to Find pointer to cell from determine channel channel linked list Update structures with Send cell to fabric results of transmission PM73487 QRT h 31 ...

Page 44

... Figure 39 designated for either unicast or multicast traf- fic. Additionally designated as either strict priority SC1, strict priority SC2, or General Purpose (GP). Associated with each weight of either 1, 4, 16, or 64. This information is PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device PM73487 QRT 32 ...

Page 45

... ...). The SC1 round-robin pointer will remain PM73487 QRT within ..., ...). ...

Page 46

... The channel is then called cell-limited. In the former case, it will remain off the ring until the fabric transmission results for PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device , Medium backpressure renders the first eight GP SCs ineligi- 39 PM73487 QRT , ...

Page 47

... For the other measurements, the value of 0 causes the measurement to always find congestion. The value of 1 may not be used. The value of F PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Link Link Link Figure 41 on page 36. The cell waits in the transmit cell PM73487 QRT h 35 ...

Page 48

... QoS, CDV minimization, MCR guarantee, fairness maxi- mization, and output isolation. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Per Service Per Queue Class (SC) 16 Service Classes (SCs) section 9.3.1.7 “TX_CH_CONFIG” starting on 39, there is an interaction between PM73487 QRT 31 Virtual Outputs (VOs) Fig- 36 ...

Page 49

... If no cell exists in the strict priority classes, and no cell exists in the SC pointed to by the active entry of the timeslot-based priority table, then the GP SCs are serviced in a weighted round-robin manner simi- PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device , ...). The SC1 round-robin pointer will remain pointed .... PM73487 QRT 37 ...

Page 50

... This helps isolate the effects of congestion on one VO from causing congestion on another VO. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device , ..., ...). Multicast Traffic 125 126 Cells are FIFO-Queued Q 10 within PM73487 QRT 38 ...

Page 51

... The PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Find pointer to cell from linked list Read OUTCHAN Play out cell and from cell buffer update channel state Figure 43. Cell Playout Steps 40. Cell ONACKed PM73487 QRT 39 ...

Page 52

... Multicast cell is available in the input FIFO. 1 Make an entry for the cell in the output FIFO for that SC on the indicated VO. Increment the MC_COUNT state bit. Check REPLICATE_CELL bit Move the head pointer in the input FIFO and clear ENQ_PEND state bit PM73487 QRT 40 ...

Page 53

... Cell header translation flow = Cell pointer control flow = Cell payload flow Figure 46. Multicast Pointer FIFO Operation PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 31 8 Per-SC, Per-VO Output Channel RAM Linked List Background Pointer Replication Process Cell Pointer PM73487 QRT Pointer FIFOs Header Cell 41 ...

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... PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device configure TX_EXP_MAX_SC_QD 163) to one-half of the input pointer FIFO depth for that 105). This will drop all cells at a section 9.3.1.7 “TX_CH_CONFIG” starting on page PM73487 QRT (refer to 189) using 42 ...

Page 55

... Receive ABR RAM DRAM Control Control RSC RAM UTOPIA Queue Loopback Engine VO RAM TSC RAM TX DRAM MC RAM Control TX DRAM Cell Buffer 100 MHz PM73487 QRT 66 MHz To QSE RS RAM RSF RAM BP/Ack from QSE BP/Ack to QSE TSF RAM TS RAM From QSE 66 MHz 43 ...

Page 56

... Mbps ATM Traffic Management Device QSE QSE (Switching (Switching Matrix) Matrix QSE/QSE Interface PM73487 QRT QSE/QRT UTOPIA Interface Interface QRT (ORT Portion QRT g (ORT Portion Forward Cell Path Backward BP/ACK Path 44 ...

Page 57

... PHY layer device to the QRT. The QRT can accept a delay four ATM clock cycles in the aligned SOC and data signals after assertion of the Receive UTOPIA ATM PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 117). When a HEC failure is detected and checking PM73487 QRT section 7.2.11 45 ...

Page 58

... PHY device. However, this condition should be minimized in the transmit direc- tion also. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “WD_TIME” on page 118). The watchdog can be PM73487 QRT 46 ...

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... Mbps ATM Traffic Management Device and the SE_INPUT_PORT_FAIL 112) is asserted. “SE_INPUT_PORT_FAIL” on page the SE_INPUT_PORT_FAIL 112) is asserted. This also increases the robustness of 112) is asserted. “PARITY_FAIL_DIS” on page PM73487 QRT interrupt (refer to 112) interrupt (refer to 107). When parity “TX_PARITY_FAIL” ...

Page 60

... This forces bad parity (even “RX_CH_TAG” on page 110) help identify subtle failures in the fabric “SE_INPUT_PORT_FAIL” on page “BP_REMOTE_FAIL” on page 111) is asserted. This is an indication of a problem in the “BP_ACK_FAIL” on page 112). There are two bits per QSE PM73487 QRT 185) is 112) is 112) by the 48 ...

Page 61

... When the BP/ACK path is determined to be bad, the ingress QRT withholds issuing valid cells and instead transmits idle cells until the fabric recovers from the fault. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “ACK_LIVE_FAIL” 112) that check the ACK response from the switch “BP_ACK_FAIL” on page “BP_ACK_FAIL” on PM73487 QRT 112). 49 ...

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... Mbps ATM Traffic Management Device “ACK_LIVE_FAIL” on page Action Taken 112) signaled to the 112) signaled to “ACK_LIVE_FAIL” 111) signaled to the microprocessor. PM73487 QRT “BP_REMOTE_FAIL” on 111). Comment Port treated as dead. Problem is probably with the BP_ACK_IN line. Port treated as dead. Problem is ...

Page 63

... Withholding backpressure on d signals to the previous stage that the port should not be used. The QSE does not necessarily have time to drop the cell by the time it has detected a parity error. PM73487 QRT Comment 51 ...

Page 64

... Withholding backpressure on h signals to the previous stage that the port should not be used. PM73487 QRT Comment Port treated as dead. Problem is probably with the BP_ACK_IN line. Port treated as dead. Problem is with the forward data flow ...

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... Port shut down until condition is ing on BP_ACK_IN(3:0). fixed. Invalid idle cell with some Port shut down on receipt of first 10/01 fail or parity error. bad idle cell until condition is fixed, as port failure is sent to the source of data by lack of backpres- sure indication. PM73487 QRT Comment Effect on Network 53 ...

Page 66

... Cell gets out on wrong port, Cell to wrong port may be noticed cell duplicated, or cell lost. by receiving QRT, if that VC is not active. Cell duplication and cell loss detection possible using marked cell count. Cell lost. Detection possible using marked cell count. PM73487 QRT 54 ...

Page 67

... Figure 49. 503-Pin EPBGA Top and Side Views (Part PMC-Sierra, Inc. PMC-Sierra, Inc. PMC-Sierra, Inc. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 40.00 ± 0.20 26.00 MAX. QRT PM73487-PI L2A0961 L_______B Lyyww 2.98 Max. PM73487 QRT Measurements are shown in millimeters. Not drawn to scale. 0.60 ±0.10 ...

Page 68

... If you need a measurement not shown in this figure, contact PMC-Sierra. Figure 49. 503-Pin EPBGA Bottom View (Part PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device 40.00 ± 0.20 35. PM73487 QRT Measurements are shown in millimeters. Not drawn to scale ...

Page 69

... C18 RATM_DATA(4 D18 RATM_DATA C19 RATM_ADD(4) D19 RATM_ADDR(0 ) C20 / D20 RATM_CLAV(0 RATM_READ_ ) EN C21 RATM_ADD(3) D21 RATM_SOC C22 RATM_CLAV(3 D22 RX_DRAM_DA ) TA(29) PM73487 QRT Ball Signal Name E1 VSS E2 ABR_RAM_AD( 12) E3 ABR_RAM_AD ABR_RAM_AD VDD E6 VSS E7 /SCAN_EN E8 W_/RD E9 ADDRDATA(24 ) E10 ADDRDATA(26 ) E11 ADDRDATA(17 ...

Page 70

... D23 TA(26) C24 RX_DRAM_DA D24 TA(24) C25 RX_DRAM_DA D25 TA(21) C26 RX_DRAM_DA D26 TA(17) C27 RX_DRAM_DA D27 TA(14) C28 RX_DRAM_DA D28 TA(10) C29 VDD D29 PM73487 QRT Signal Name Ball Signal Name RX_DRAM_DA E23 RX_DRAM_DA TA(23) TA(16) RX_DRAM_DA E24 RX_DRAM_DA TA(20) TA(18) RX_DRAM_DA E25 VDD TA(15) VSS E26 RX_DRAM_DA TA(11) RX_DRAM_DA E27 RX_DRAM_DA ...

Page 71

... A(4) R3 CH_RAM_ADD V27 (16) R4 CH_RAM_ADD V28 (15) R5 CH_RAM_ADD V29 (17) R11 VSS W1 R13 VSS W2 W3 R17 VSS W4 R19 VSS W5 R25 SE_D_OUT0( PM73487 QRT Signal Name Ball Signal Name SE_SOC_IN(0) AA VSS 1 BP_ACK_OUT( AA CH_RAM_DAT 1) 2 A(18) BP_ACK_OUT( AA CH_RAM_DAT 3) 3 A(19) BP_ACK_IN(1) AA CH_RAM_DAT 4 A(27) BP_ACK_IN(2) AA CH_RAM_DAT 5 A(22) VSS ...

Page 72

... T29 VSS Y5 U1 CH_RAM_DAT Y25 A(5) U2 CH_RAM_DAT Y26 A(7) U3 CH_RAM_DAT Y27 A(8) U4 CH_RAM_DAT Y28 A(12) U5 CH_RAM_DAT Y29 A(15) U11 VSS PM73487 QRT Signal Name Ball Signal Name VSS AC2 CH_RAM_DAT A(28) VSS AC3 CH_RAM_DAT A(30) VSS AC4 /ALRAM_ADSC VSS AC5 ALRAM_ADD(4 ) SE_D_IN2(0) AC2 TX_DRAM_DA 5 TA(22) SE_D_IN2(3) AC2 TX_DRAM_DA 6 TA(27) SE_D_IN3(3) ...

Page 73

... N27 SE_D_OUT2(3) K4 ABR_RAM_CL N28 SE_D_OUT1( CH_RAM_ADD N29 SE_D_OUT2(1) 17N PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Table 7. Signal Locations (Continued) Ball Signal Name Ball U13 VSS U15 VSS U17 VSS U19 VSS PM73487 QRT Signal Name Ball Signal Name 61 ...

Page 74

... TATM_ADD( TATM_ADD( TX_DRAM_RA TX_DRAM_AD AH 20 D(3) 20 PM73487 QRT Signal Name Ball Signal Name VSS AJ1 VDD VSS AJ2 VSS VDD AJ3 VDD ALRAM_ADD(1 AJ4 VSS 2) ALRAM_ADD(1 AJ5 VDD 5) ALRAM_DATA AJ6 ALRAM_DATA (0) (5) ALRAM_DATA AJ7 ...

Page 75

... TA( TX_DRAM_DA AH 25 TA(14 TX_DRAM_DA AH 26 TA(13 TX_DRAM_DA AH 27 TA(19 TX_DRAM_DA AH 28 TA(21 VSS PM73487 QRT Signal Name Ball Signal Name TX_DRAM_DD( AJ2 VSS 2) 1 TX_DRAM_DA AJ2 VSS TA( AJ2 VSS TX_DRAM_CS TX_DRAM_DA AJ2 TX_DRAM_DA TA(1) 4 TA(7) TX_DRAM_DA AJ2 VSS TA(10) 5 TX_DRAM_DA AJ2 ...

Page 76

... Mod STATS_STRB is an active high signal that indicates a fixed position in the cell time in the SYS_CLK domain. This can be used to trigger external circuitry. PM73487 QRT Description Processor Clock Address/Data Bits are part of the 32-bit processor address/data bus. Address/Data Status is an active low sig- nal that indicates an address state ...

Page 77

... SE_D_IN0, respectively Switch Element Data In Ports Bits 3 TTL down to 0 are part of the nibble-wide, 50 MHz data pathway that carries the cell from the switch fabric. TTL TTL TTL PM73487 QRT Description 65 ...

Page 78

... RAM mod- ules Out 5 ma Mod CH_RAM Write Enable active low signal that strobes CH_RAM_DATA(15:0) and CH_RAM_PARITY0 into an external SRAM. Out 5 ma Mod CH_RAM Write Enable active low signal that strobes CH_RAM_DATA(31:16) and CH_RAM_PARITY1 into an external SRAM. PM73487 QRT Description 66 ...

Page 79

... Mod AL RAM Write Enable is an active low signal that strobes data into an external SRAM. Out 5 ma Mod AL RAM Synchronous Address Status Controller is an active low signal that causes new addresses to be registered within the external SSRAM. PM73487 QRT Description Description 67 ...

Page 80

... RAM modules Out 5 ma Mod ABR_RAM Advance is an active low signal that signals the external SSRAM to advance its address. Out 5 ma Mod ABR RAM Write Enable is an active low signal that enables a write into the ABR_RAM. PM73487 QRT Description 68 ...

Page 81

... Out 5 ma Mod Receive DRAM Column Address Strobe is an active low signal that writes in the column address. Out 5 ma Mod Receive DRAM Write Enable is an active low signal that enables a write into the synchronous DRAM. PM73487 QRT Description “RX_DRAM_TYPE” on 104), 69 ...

Page 82

... Transmit DRAM Row Address Strobe is an active low signal that writes in the row address. Out 5 ma Mod Transmit DRAM Column Address Strobe is an active low signal that writes in the column address. PM73487 QRT Description 104) then connect “RX_DRAM_TYPE” 104), then these are 70 ...

Page 83

... NOTE: DQM (I/O mask enables) pins to the SGRAM or SDRAM need to be tied to logic 0. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Drive/ Slew Type Input Level Rate Out 5 ma Mod Transmit DRAM Write Enable is an active low signal that enables a write into the syn- chronous DRAM. PM73487 QRT Description 71 ...

Page 84

... LV Receive UTOPIA ATM Layer Cell TTL Available Bits indicate the selected PHY layer devices have another cell. Out 12 ma Mod Receive UTOPIA ATM Layer Read Enable causes a read from the FIFO in the PHY layer device. PM73487 QRT Description Description 72 ...

Page 85

... MUST be pulled up for functional mode on the board. Scan Test Enable is used to enable the internal scan test logic. Connect this signal to VDD through a pull-up resistor. N/A N/A Process Monitor is used for manufacturing test connected to a NAND tree that may be used for VIL/VIH testing. PM73487 QRT Description 73 ...

Page 86

... PROCMON and disable all input pull up resistors for in-circuit IDD tests TTL Reset is an active low signal used to ini- tialize or re-initialize the device. SE_CLK must be present for the reset to take effect. In N/A Supply voltage 3.3 ± N/A Ground. PM73487 QRT Description 74 ...

Page 87

... I = Specified DC Drive OL current(in Pin Description section) assuming the UTOPIA interface drivers are not simultaneously loaded SE_CLK = 50 MHz SYS_CLK= 100 MHZ ATM_CLK = 66 MHZ = 3 PM73487 QRT Min Max Unit -0.3 3 -65 125 ° ...

Page 88

... The junction temperature must be kept below 125°C while the device is operating. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Conditions To meet timing on any signal. Condition Still air 200 lfpm 400 lfpm 600 lfpm PM73487 QRT Min Max Unit ...

Page 89

... Mbps ATM Traffic Management Device Trdath Trdatasu Trsocsu Signals ATM_CLK ATM_CLK RATM_ADD(4:0) RATM_CLAV(3:0) RATM_CLAV(3:0) /RATM_READ_EN RATM_SOC RATM_DATA(15:0) RATM_DATA(15:0) PM73487 QRT 55. Unless otherwise TraddQ Trclavh Trclavsu Min ...

Page 90

... PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Ttclavh Ttclavsu Signals ATM_CLK TATM_ADD(4:0) TATM_CLAV(3:0) /TATM_WRITE_EN TATM_SOC TATM_DATA(15:0) TATM_CLAV(3:0) TATM_PARITY PM73487 QRT TtdataQ Min Max Unit 55 MHz 3 3.3 9.5 ns 3.3 9 ...

Page 91

... Tcl Tcl Tckh Tcksu Tcash Tcassu COLUMN Tbah Tbasu Signals RX_DRAM_CLK RX_DRAM_CLK RX_DRAM_CLK RX_DRAM_ADD(8:0) RX_DRAM_BA RX_DRAM_ADD(8:0) RX_DRAM_BA DRAM_CKE DRAM_CKE /RX_DRAM_RAS /RX_DRAM_RAS /RX_DRAM_CAS /RX_DRAM_CAS /RX_DRAM_CS(1:0) /RX_DRAM_CS(1:0) RX_DRAM_DATA(31:0) PM73487 QRT Trdh Trds VALID DATA Min Max Unit 2.7 ns 2.9 ns 1 3 ...

Page 92

... Twesu Tdh Tdsu VALID DATA VALID DATA Tbah Tbasu Signals RX_DRAM_CLK RX_DRAM_CLK RX_DRAM_CLK RX_DRAM_ADD(8:0) RX_DRAM_ADD(8:0) RX_DRAM_BA RX_DRAM_BA DRAM_CKE DRAM_CKE /RX_DRAM_RAS /RX_DRAM_RAS /RX_DRAM_CAS /RX_DRAM_CAS /RX_DRAM_CS(1:0) /RX_DRAM_CS(1:0) PM73487 QRT Min Max Unit 2 VALID DATA Min Max Unit ...

Page 93

... Tcl Tcksu Tcsh Tcssu Trash Trassu Tcash Tcassu Taddrh Taddrsu COLUMN Tweh Twesu Tbah Tbasu Signals TX_DRAM_CLK TX_DRAM_CLK TX_DRAM_CLK TX_DRAM_ADD(8:0) TX_DRAM_ADD(8:0) TX_DRAM_BA TX_DRAM_BA DRAM_CKE PM73487 QRT Min Max Unit 2.8 ns 1 Tckh Trdh Trds VALID DATA Min Max Unit 10 ...

Page 94

... TX_DRAM_DATA(31: Tch Tch Tcl Tcl Tckh Tcksu Tcash Tcassu COLUMN Tdh Tdsu VALID DATA VALID DATA Tbah Tbasu Signals TX_DRAM_CLK TX_DRAM_CLK TX_DRAM_CLK TX_DRAM_ADD(8:0) TX_DRAM_ADD(8:0) TX_DRAM_BA TX_DRAM_BA PM73487 QRT Min Max Unit * ns 3.3 ns 1.5 ns 3.3 ns 1.5 ns 2 2 ...

Page 95

... TX_DRAM_DATA(31:0) TX_DRAM_DATA(31:0) ALRAM READ CYCLE 2 3 Tcyc Tcyc Tch Tch Tcl Tcl Tadh Toesu Toeh Tadrh Tadh Tadrh Tweh Trdh Trds VALID DATA PM73487 QRT Min Max Unit * 3.3 ns 1.5 ns 3.3 ns 1.5 ns 2.7 ns 1.5 ns 2.9 ns 1.5 ns 2.2 ns 1.5 ns ...

Page 96

... ALRAM_ADD(18:0), ALRAMADD17N, ALRAMADD18N /ALRAM_OE /ALRAM_OE /ALRAM_ADSC /ALRAM_ADSC ALRAM_DATA(16:0) ALRAM_DATA(16:0) /ALRAM_WE /ALRAM_WE ALRAM WRITE CYCLE 2 3 Tcyc Tcyc Tch Tch Tcl Tcl Tadh Toeh Tadrh Tadrh Tadrh Tweh Tdh PM73487 QRT Min Max Units 2.7 ns 1 2.8 ns 1.5 ns 3.8 ns 1 ...

Page 97

... ALRAM_DATA(16:0) ALRAM_DATA(16:0) /ALRAM_WE /ALRAM_WE CHRAM READ CYCLE 2 3 Tcyc Tcyc Tch Tch Tcl Tcl Tadh Toesu Tah Tah Tweh Trdh Trds VALID DATA Trdh Trds Trdh Trds PM73487 QRT Min Max Units 2.7 ns 1 2.8 ns 1.5 ns 2.6 ns 1 ...

Page 98

... CH_RAM_ADD17N /CH_RAM_OE /CH_RAM_OE /CH_RAM_ADSC /CH_RAM_ADSC CH_RAM_DATA(31:0) CH_RAM_DATA(31:0) /CH_RAM_WE /CH_RAM_WE CHRAM WRITE CYCLE 2 3 Tcyc Tcyc Tch Tch Tcl Tcl Tadh Toeh Tah Tah Tweh Tdh Tdh Tdh PM73487 QRT Min Max Units ...

Page 99

... CH_RAM_DATA CH_RAM_DATA /CH_RAM_WE /CH_RAM_WE ABRAM READ CYCLE 2 3 Tcyc Tcyc Tch Tch Tcl Tcl Tadsph Toesu Tadrh Trds Address Data 1 Tweh Tadvnh Tadvnsu Figure 60. AB RAM Read Timing PM73487 QRT Min Max Units 3.1 ns 0 2.5 ns ...

Page 100

... ABRAM WRITE CYCLE Tcyc Tcyc Tch Tch Tcl Tcl Tadsph Tadrh Tadrh Tadrsu Address Data 1 Tweh Twesu Figure 61. AB RAM Write Timing PM73487 QRT Min Max Units 2 3 ...

Page 101

... Write enable hold time Tadspsu Address status processor setup time Tadsph Address status processor hold time PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Signals Min AB_RAM_CLK 10 AB_RAM_CLK 3 AB_RAM_CLK 3 AB_RAM_AD(16:0) 2.6 AB_RAM_AD(16:0) 1 /AB_RAM_WE 3.5 /AB_RAM_WE 1 /AB_RAM_ADSP 3.3 /AB_RAM_ADSP 1 PM73487 QRT Max Units ...

Page 102

... BP_ACK_IN(3:0) SE_D_IN(3:0,3:0), SE_SOC_IN(3:0), BP_ACK_IN(3:0) SE_D_OUT(3:0,3:0), BP_ACK_OUT(3:0), SE_SOC_OUT SE_D_OUT(0,3:0) and SE_SOC_OUT SE_D_OUT(1,3:0) and SE_SOC_OUT SE_D_OUT(2,3:0) and SE_SOC_OUT SE_D_OUT(3,3:0) and SE_SOC_OUT SE_D_IN(0,3:0) and SE_SOC_IN(0) SE_D_IN(1,3:0) and SE_SOC_IN(1) SE_D_IN(2,3:0) and SE_SOC_IN(2) SE_D_IN(3,3:0) and SE_SOC_IN(3) PM73487 QRT Fseclk Fseclk Tctho Min Max Unit 65.4 68 MHz ...

Page 103

... Medium-priority cell. carded by the QSE Low-priority cell Undefined. Cell discarded by b QSE. MCG_3 MCG_2 MCG_1 MCG_0 Not used by the QSE. PM73487 QRT Min Max Unit Comment cells, since they are dis- b The QSE interprets all four nib- bles as the MCG. 91 ...

Page 104

... All Marching 1. Marching “1” pattern protects against bridging b faults. If the QRT is not in sync with RX_CELL_START, the device outputs 1010 here. : Marching 1. Marching “1” pattern protects against bridging b faults. : Marching Marching PM73487 QRT Comment Comment b 92 ...

Page 105

... Chip select setup time Tcsh Chip select hold time PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device MICROPROCESSOR READ CYCLE ...... ...... ...... Tradsh Taddrh Signals PCLK ADDRDATA(31:0) ADDRDATA(31:0) /ADS /ADS /CS /CS PM73487 QRT ...... ...... ...... Tcsh Tdath DATA Tweh Trclkq Trclkq Min Max Unit 12.5 50 MHz ...

Page 106

... Mbps ATM Traffic Management Device Signals W_/RD W_/RD ADDRDATA(31:0) /READY MICROPROCESSOR WRITE CYCLE ...... ...... ...... Tradsh Taddrh Tdatsu DATA Signals PCLK PCLK ADDRDATA(31:0) ADDRDATA(31:0) /ADS /ADS /CS /CS /READY ADDRDATA(31:0) PM73487 QRT Min Max Unit ...... ...... ...... Tcsh Tdath Tclkq Tclkq Min Max Unit 12.5 50 ...

Page 107

... Released Datasheet PMC-980618 Issue 3 Symbol Parameter Tdatsu Data setup time PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Signals Min ADDRDATA(31:0) 3 PM73487 QRT Max Unit ns 95 ...

Page 108

... RX_CELL_START is ignored and processing starts with the next RX_CELL_START. /RESET(i) SE_CLK(i) RX_CELL_START(i) Symbol Parameter Tres Reset assertion time. Trstproc Reset processing time. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Tres Tres Trstproc Trstproc Figure 65. Reset Timing Signals Min Max /RESET 40 /RESET PM73487 QRT Unit SE_CLK periods 60 SE_CLK periods 96 ...

Page 109

... JTAG_TCK-to-output delay /JTAG_RESET-to-output delay PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Tjres Tjres Tjsu Tjh Tjsu Tjh Tjq Figure 66. JTAG Timing Signals JTAG_TMS, JTAG_TDI /JTAG_RESET JTAG_TMS, JTAG_TDI JTAG_TDO PM73487 QRT Tcl Tcl Min Max Unit 1 MHz ...

Page 110

... R Indicates the transmit UTOPIA status. R/W Indicates the transmit UTOPIA watchdog liveness. R Driven with a 0. Mask on reads to maintain compatibil- ity with future versions. R/W Contains alignment value for the internal RxCellStart signal from the external RX_CELL_START. PM73487 QRT 98 ...

Page 111

... R Twenty-four-bit counter of cells sent in the transmit direction. R Twenty-four-bit counter of cells dropped in the transmit direction. R/W Configuration of the Rx Lower 16 Service Class Group. R/W State of the Rx Lower 16 Service Class Group. R/W Configuration of the Rx Lower 32 Service Class Group. R/W State of the Rx Lower 32 Service Class Group. PM73487 QRT 99 ...

Page 112

... Configuration of the Tx Lower 4 Service Class Group. R/W State of the Tx Lower 4 Service Class Group. R/W Configuration of the Tx Lower 8 Service Class Group. R/W State of the Tx Lower 8 Service Class Group. R/W Configuration of the Tx Lower 12 Service Class Group. R/W State of the Tx Lower 12 Service Class Group not initialize. PM73487 QRT 100 ...

Page 113

... Resets the device, except for the microprocessor interface. The processor may initialize all the registers and internal memories without the cell flow while this is asserted. The switch fabric and UTOPIA interface are running, but there is no cell flow. 0 Normal operation PM73487 QRT 101 ...

Page 114

... Ram. This value must be maintained until the RF_RAM_COMPLETE bit in the BIST_RESULT register is ‘1’. 10 BIST controller test mode. Perform the controller error detector test. The RF_RAM_BIST_FAIL bit will be set to ‘1’ at the end of this operation 11 Invalid control code. Do not use . b PM73487 QRT 102 ...

Page 115

... SYSCLK. 1 Loopback cells from receive UTOPIA to transmit UTOPIA. 0 Normal operation DISABLE_RANDOMIZATION = 1; refer to “DISABLE_RANDOMIZATION” on page phase aligners (set CPA_OFF = 1; refer to 1 Loopback at the switch fabric interface. 0 Normal operation PM73487 QRT 107) and turn off the complex “CPA_OFF” on page 107). 103 ...

Page 116

... Using the Double Cycle Deselect (DCD) type SSRAM for ALRAM Resets Not used Write with maintain software compatibility with future versions. (10) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description 69. . 70. 175) as part of the channel lookup. PM73487 QRT 104 ...

Page 117

... CH_RAM = 128K 32 SSRAM channels. 3 CH_RAM = 256K h 16K channels. Resets PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device (Continued) Description “VCI_TABLE” on page 176. 8 512 64. 32 SSRAM. 32 SSRAM. 32 SSRAM. PM73487 QRT section 9.2.1 105 ...

Page 118

... Interface Cell Format.” on page 91) (nibble 0 of the SE_D_OUT) for all cells sent to the switch fabric Use the RX_CH_SF_SPARE “RX_CH_CONFIG” on page 184 RX_CH_CONFIG(4) word for the SF_SPARE bit PM73487 QRT “TX_CH_CELLS_DRPD” on page and “RX_CH_CONFIG” (“RX_SERVICE_TABLE” nibble 1. ...

Page 119

... Enable parity checking on the switch fabric. Turn off complex phase aligner at the switch fabric interface. Use complex phase aligner to retime signals at the switch fabric interface. Disable the randomization at the switch fabric interface. Enable the randomization at the switch fabric interface. PM73487 QRT 107 ...

Page 120

... RAM BIST memory test has FAILED. If VO_RAM_BIST_CONTROL is set RAM BIST controller test has FAILED. 1 RAM BIST controller test has PASSED. Note: This bit must be cleared by writing a ‘0’ before executing the RAM_BIST memory or controller tests PM73487 QRT 108 ...

Page 121

... RF_RAM_BIST memory test has completed . b 0 VO_RAM_BIST memory test is in progress 1 VO_RAM_BIST memory test has completed . b 0 RS_RAM_BIST memory test is in progress 1 RS_RAM_BIST memory test has completed . b 0 TS_RAM_BIST memory test is in progress 1 TS_RAM_BIST memory test has completed . b PM73487 QRT 109 ...

Page 122

... The number of cells mod 16 that were successfully transmitted out of SE_D_OUT(2,3:0). (11:8) RX_MARKED_CELLS(1) The number of cells mod 16 that were successfully transmitted out of SE_D_OUT(1,3:0). (7:4) RX_MARKED_CELLS(0) The number of cells mod 16 that were successfully transmitted out of SE_D_OUT(0,3:0). (3:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description PM73487 QRT 110 ...

Page 123

... The transmit parity was good during the last valid cell time. 1 The backpressure was ignored during the last cell time, because a cell was received in violation of the backpressure that had been given. 0 The backpressure was not ignored during the last cell time. PM73487 QRT 48, “Liveness of Backpressure Sig- 50, and to Table 2 on 111 ...

Page 124

... At least one of the UTOPIA output watchdogs is currently expired. 0 None of the UTOPIA output watchdogs is currently expired. 1 The device is in the empty congestion state. 0 The device is not in the empty congestion state. PM73487 QRT 47, “Redundant Cell 47, Table 3 on page 48, “Liveness of Backpressure 50, Table 2 on page 48, “ ...

Page 125

... The transmit parity calculated over the first 12 nibbles of the cell header coming into the QRT on SE_D_IN#(3:0) was bad at least once since this latch was read. 0 The transmit parity was good in every cell since this latch was read. PM73487 QRT for more information. 113 ...

Page 126

... The congestion is declared to have been relieved when the queue depth crossed back above twice the configured congestion threshold. Initialize initial setup. Software modifications to these locations after setup may cause incorrect operation. PM73487 QRT for more information. for more information. for more information. 114 ...

Page 127

... Mask the transmit parity fail interrupt (refer to page 111). 0 Enable the transmit parity fail interrupt. 1 Mask the backpressure ignored interrupt (refer to page 111). 0 Enable the backpressure ignored interrupt. PM73487 QRT “ACK_LIVE_FAIL” on “UT_SOC_FAIL” on “UT_CLK_FAIL” on “SF_CLK_FAIL” on 111). 111). 111). 111). “TX_PARITY_FAIL” on “BP_IGNORED” on ...

Page 128

... Enable the backpressure fail interrupt. 1 Mask the output watchdog interrupt (refer to page 112). 0 Enable the output watchdog interrupt. 1 Mask the empty queue depth interrupt (refer to 0 Enable the empty queue depth interrupt. PM73487 QRT 112). “BP_ACK_FAIL” on “OUT_WD_INT” on “EQD_INT” on page 112). 116 ...

Page 129

... Tx side configured for MPHY, Rx side configured for single PHY. Useful for RCMP applications. 010 Tx and Rx side configured for single PHY. 001 Tx and Rx side configured for MPHY. 000 Tx and Rx side configured for single PHY. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Explanation PM73487 QRT 117 ...

Page 130

... The device is connected to a normal transmit UTOPIA Level 2 interface. 1 The device is connected to an OC-12C line at receive UTOPIA address 0. This overrides the setting of the UTOPIA_2 bit. 0 The device is connected to a normal receive UTOPIA Level 2 interface. PM73487 QRT . 2-level priority servicing . The suite . 118 ...

Page 131

... The interface is in UTOPIA Level 1 mode. Description 1 Service PHY device 30 at high priority. 0 Service PHY device 30 at low priority. 1 Service PHY device 29 at high priority. 0 Service PHY device 29 at low priority Service PHY device 0 at high priority. 0 Service PHY device 0 at low priority. PM73487 QRT 119 ...

Page 132

... Enable cell transmission from PHY device 30. 0 Disable cell transmission from PHY device 30. 1 Enable cell transmission from PHY device 29. 0 Disable cell transmission from PHY device 29 Enable cell transmission from PHY device 0. 0 Disable cell transmission from PHY device 0. 121). PM73487 QRT 120 ...

Page 133

... TATM_CLAV(3:0) for a period less than WD_TIME. 0 The PHY device at address 29 has not responded to a poll with an assertion of TATM_CLAV(3:0) for a period longer than WD_TIME. PHY device 29 has expired, therefore drain remaining cells intended for PHY device 29 at lowest priority PM73487 QRT 118) when polled. Cells bound 121 ...

Page 134

... TATM_CLAV(3:0) for a period less than WD_TIME. 0 The PHY device at address 0 has not responded to a poll with an assertion of TATM_CLAV(3:0) for a period longer than WD_TIME. PHY device 0 has expired, therefore drain remaining cells intended for PHY device 0 at lowest priority. simplicity in the distribution Description PM73487 QRT of 122 ...

Page 135

... Ignore the configured SCG congestion limits 1 Enable Random Early packet Discard function. The RX_xxx_EXP_CONG_QD that is used for each of the CH, SC, SCG, and DIR settings is randomly chosen to be the user configured one or the value one codepoint below the configured value. 0 RED disabled PM73487 QRT 123 ...

Page 136

... RX_xxx_EXP_CONG_QD. This is a more robust setting which forces the switch to make the most of each dropping event at the expense of access to cell buffers in the steady state. PM73487 QRT 124 ...

Page 137

... RX_xxx_EXP_CONG_QD. This is a more robust setting which forces the switch to make the most of each dropping event at the expense of access to cell buffers in the steady state. PM73487 QRT 125 ...

Page 138

... Normal operation. 1 Disable the 3rd instance of the U process. The U process enqueues the cells onto the data structures. 0 Enable this process. 1 Disable the 2nd instance of the U process. 0 Enable this process. 1 Disable the 1st instance of the U process. 0 Enable this process. PM73487 QRT 126 ...

Page 139

... SDRAM. B3 works as a pair with U1. 0 Enable this process. 1 Disable the 2nd instance of the B process. B2 works as a pair with U3. 0 Enable this process. 1 Disable the 1st instance of the B process. B1 works as a pair with U2. 0 Enable this process. PM73487 QRT 127 ...

Page 140

... TX_xxx_EXP_CONG_QD. This is a more robust setting which forces the switch to make the most of each dropping event at the expense of access to cell buffers in the steady state. PM73487 QRT 128 ...

Page 141

... TX_xxx_EXP_CONG_QD. This is a more robust setting which forces the switch to make the most of each dropping event at the expense of access to cell buffers in the steady state. PM73487 QRT 129 ...

Page 142

... Enable this process. 1 Disable the 3rd instance of the E process associated with switch fabric port 2. 0 Enable this process. 1 Disable the 2nd instance of the E process associated with switch fabric port 1. 0 Enable this process. PM73487 QRT 130 ...

Page 143

... Released Datasheet PMC-980618 Issue 3 Field (Bits) DISABLE_E1 (0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description 1 Disable the 1st instance of the E process associated with switch fabric port 1. 0 Enable this process. PM73487 QRT 131 ...

Page 144

... The device should be reset and reinitialized. 0 The Tx Lower4 Service Class Group Queue Depth is non-negative. 1 The Tx Direction Queue Depth is negative. This is a non-recoverable state for the device. The device should be reset and reinitialized. 0 The Tx Direction Queue Depth is non-negative. PM73487 QRT 132 ...

Page 145

... The device should be reset and reinitialized Channel Queue Depth is non-negative Service Class Queue Depth is negative. This is a non-recoverable state for the device. The device should be reset and reinitialized Service Class Queue Depth is non-negative. PM73487 QRT 133 ...

Page 146

... A circular link is not being written to the Rx linked list circular link is being written to the Tx linked list. This non-recover- able state occurs when a link is added to the TX linked list that points to itself. The device should be reset and reinitialized circular link is not being written to the Tx linked list. PM73487 QRT 134 ...

Page 147

... The QE_TX_LOWER4_SCG_QD_NEG condition occurred since this latch was read 0 The QE_TX_LOWER4_SCG_QD_NEG condition has not occurred since this latch was read 1 The QE_TX_DIR_QD_NEG condition occurred since this latch was read 0 The QE_TX_DIR_QD_NEG condition has not occurred since this latch was read PM73487 QRT 135 ...

Page 148

... The QE_TX_VO_QD_NEG condition has occurred since this latch was read. 0 The QE_TX_VO_QD_NEG condition has not occurred since this latch was read. 1 The QE_RX_CH_QD_NEG condition has occurred since this latch was read. 0 The QE_RX_CH_QD_NEG condition has not occurred since this latch was read. PM73487 QRT 136 ...

Page 149

... The QE_RX_CIRC_LINK condition has occurred since this latch was read. 0 The QE_RX_CIRC_LINK condition has not occurred since this latch was read. 1 The QE_TX_CIRC_LINK condition has occurred since this latch was read. 0 The QE_TX_CIRC_LINK condition has not occurred since this latch was read. PM73487 QRT 137 ...

Page 150

... Enable this interrupt. 1 Mask the QE_TX_DIR_QD_NEG interrupt. 0 Enable this interrupt. 1 Mask the QE_RX_LOWER48_SCG_QD_NEG interrupt. 0 Enable this interrupt. 1 Mask the QE_RX_LOWER32_SCG_QD_NEG interrupt. 0 Enable this interrupt. 1 Mask the QE_RX_LOWER16_SCG_QD_NEG interrupt. 0 Enable this interrupt. 1 Mask the QE_RX_DIR_QD_NEG interrupt. 0 Enable this interrupt. PM73487 QRT 138 ...

Page 151

... Enable this interrupt. 1 Mask the QE_RX_ETOP_PARITY interrupt 0 Enable this interrupt. 1 Mask the QE_UNMAPPED_VI interrupt. 0 Enable this interrupt. 1 Mask the QE_VO_MISMATCH interrupt. 0 Enable this interrupt. 1 Mask the QE_RX_CIRC_LINK interrupt. 0 Enable this interrupt. 1 Mask the QE_TX_CIRC_LINK interrupt. 0 Enable this interrupt. PM73487 QRT 139 ...

Page 152

... RX_DIR_E_CUR_QD Current count of empty cells in the receive direction. Initialize to the number of cells (15:0) setting. NOTE: The number of buffers is limited to the physical number of buffers minus PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device byte) h Description . h byte) h Description three. PM73487 QRT “SW_RESET” on 140 ...

Page 153

... Current count of empty cells in the transmit direction. Initialize to the number of cells (15:0) setting. NOTE: The number of buffers is limited to the physical number of buffers minus PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device byte) h Description of full buffers. byte) h Description two. PM73487 QRT “SW_RESET” on 141 ...

Page 154

... SW_RESET = 1 or HW_RESET = 1 (refer to and PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device byte) h Description “HW_RESET” on page 101). byte) h Description “HW_RESET” on page 101). byte) h Description “HW_RESET” on page 101). PM73487 QRT “SW_RESET” “SW_RESET” “SW_RESET” 142 ...

Page 155

... TX_DROPPED_CELLS 24-bit rollover counter of the number of cells dropped by the transmit direction. This (23:0) counter is reset to 0 when SW_RESET = 1 or HW_RESET = 1 (refer to and PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device byte) h Description “HW_RESET” on page 101). PM73487 QRT “SW_RESET” 143 ...

Page 156

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) RX_LWR16_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 144 ...

Page 157

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) RX_LWR32_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 145 ...

Page 158

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) RX_LWR48_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 146 ...

Page 159

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) TX_LWR4_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 147 ...

Page 160

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) TX_LWR8_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 148 ...

Page 161

... RESERVED Write with 0 each time SW_RESET is asserted to maintain future SW compatibility. (15) TX_LWR12_DATA Current queue depth for this SCG. Initialize to 0000 each time SW_RESET is (14:0) asserted to maintain software compaitibility. Resets to 0000. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device ) h Description ) h Description PM73487 QRT 149 ...

Page 162

... Contains the cell buffers for cells coming from the switch fabric. For information, refer to sections CONDITION_PRES_BITS” on page “RX_DIR_STATE (Internal Structure)” on page “TX_DIR_CONFIG” on page (Internal Structure)” on page PM73487 QRT 622 Mbps ATM Traffic Management Device Description “QUEUE ENGINE 132, 140, 141, and “ ...

Page 163

... Figure 67. Transmit Service Class RAM (TSC_RAM) Memory Map PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device D15 D0 TX SCQ Control Block( SCQ Control Block( SCQ Control Block TX SCQ Control Block(495 Not Used Not Used PM73487 QRT 151 ...

Page 164

... SCQ to be dropped. A value TX_SCQ_EXP_CONG_QD TX_SCQ_CUR_QD > causes this SCQ congestion at all times. A value causes this SCQ to enter congestion at a depth of 31744 cells. h PM73487 QRT Description limits this may not be h 152 ...

Page 165

... RAM is not present in these bit locations. (31:16) TX_SCQ_HEAD The head of the queue for this SCQ. (15:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device (Continued) Description (TX_SCQEXP_WEIGHT 2) 2 Description . h For Unicast SCs Description PM73487 QRT “SW_RESET” This count does not h “SW_RESET” on 153 ...

Page 166

... Write with maintain software compatibility with future versions. (15:5) TX_SCQ_OUT_FIFO_TAIL The tail of the output multicast FIFO (that is, the WRITE pointer). (4:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device For Multicast SCs Description For Unicast SCs Description For Multicast SCs Description PM73487 QRT “SW_RESET” on 154 ...

Page 167

... The RSC_RAM contains the Receive Service Class (RX SC) Control Block. Figure 68 shows a memory map of the RSC_RAM. D15 110000 h 11013F h 110140 h 11017F h Figure 68. Receive Service Class RAM (RSC_RAM) Memory Map PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Control Block Not Used PM73487 QRT 155 ...

Page 168

... dropped. A value RX_SC_EXP_CONG_QD RX_SC_CUR_QD > causes this congestion at all times. A value causes this SC to enter congestion at a depth of 31744 cells. h (RX_SC_EXP_WEIGHT 2) weight = 2 PM73487 QRT Description limits this may not be h 156 ...

Page 169

... Write with maintain software compatibility with future versions. (15:14) RX_SC_PREV_CHAN Points to the channel that was just served before the current channel in the round-robin (13:0) service. Initialize to 0000 PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “SW_RESET” on Description . h “SW_RESET” on Description . h “SW_RESET” on Description . h PM73487 QRT 157 ...

Page 170

... Increment when a new channel is added (that is, when a cell received from the receive UTOPIA interface is the first cell of the channel). • Decrement when the last cell of a channel has been successfully transmitted to the switch fabric. PM73487 QRT “SW_RESET” 158 ...

Page 171

... Figure 69 shows the VO_RAM memory map. 120000 12009F 1200A0 1200BF 1200C0 1200FF Figure 69. Virtual Output Control RAM (VO_RAM) Memory Map PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device h Transmit VO Control Block h h Transmit SC Control Block h h Transmit Multicast SC Control Block h PM73487 QRT 159 ...

Page 172

... Write with maintain software compatibility with future versions. R/W State word 1 of the service algorithm for this VO. R/W Write with maintain software compatibility with future versions. Description TX_VO_EXP_MAX_QD TX_VO_CUR_QD causes all cells for this dropped. A value PM73487 QRT Description limits this 160 ...

Page 173

... congestion at all times. A value causes this VO to enter congestion at a depth of 31744 cells. h Description . This field is maintained by a state machine and is read-only after initial- h Description PM73487 QRT may not be h “SW_RESET” on “SW_RESET” on page 101) is 161 ...

Page 174

... Write with maintain software compatibility with future versions. (7) TX_VO_TIME_SLOT_PTR Points to one of the 128 timeslot SCs in the TX_SERVICE_TABLE (refer to (6:0) “TX_SERVICE_TABLE” on page PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device (Continued) Description Description Description 181). Initialize to 0000000. PM73487 QRT “SW_RESET” on “SW_RESET” on 162 ...

Page 175

... dropped. A value TX_SC_EXP_CONG_QD TX_SC_CUR_QD > causes this congestion at all times. A value causes this SC to enter congestion at a depth of 31744 cells. h PM73487 QRT Description limits this may not be h 163 ...

Page 176

... The next multicast linked list entry (refer to sec- tion “MC_LIST” on page into an SCQ output FIFO. R/W Initialize initial setup. Software modifi- cations to this location after setup may cause incorrect operation. PM73487 QRT “SW_RESET” on “SW_RESET” on offset Description 195 transferred 164 ...

Page 177

... RAM is not present in these bit locations. (31:16) Not used Write with maintain software compatibility with future versions. (15:5) TX_SC_MC_BOTTLE Bottlenecked SCQ for multicast in this SC. Initialize to 0. (4:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “SW_RESET” on Description “SW_RESET” on Description “SW_RESET” on Description PM73487 QRT 165 ...

Page 178

... Mbps ATM Traffic Management Device Description RAM is not present in these bit locations. The next header of the multicast linked list entry (refer to section on page 195 transferred out to an SCQ output FIFO. Initialize to 0. PM73487 QRT “SW_RESET” on “MC_LIST” 166 ...

Page 179

... NOTE: This word also contains OUTCHAN(15:13). R/W The sequence number and channel number for the cell intended for RSF transmission R/W The Explicit Rate (ER) and cell buffer pointer for the cell intended for RSF transmission. Description “RX_CH_TAG” on page 185. PM73487 QRT Description “SW_RESET” on 167 ...

Page 180

... Write with maintain software compatibility with future versions. (30:22) RX_RSF_SN The SN for the cell pending, or that has completed, RSF transmission. (21:16) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “SW_RESET” on Description “RX_CH_TAG” on page “SW_RESET” on Description “SW_RESET” on Description PM73487 QRT 185. 168 ...

Page 181

... The sequence number of the cell received from the TSF. (21:16) TX_TSF_OUTCHAN The transmit OUTCHAN channel number of the cell received from the TSF. (15:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device (Continued) Description Description (500000 byte TSF_buffer_number TSF_buffer_number h Description PM73487 QRT “SW_RESET” on 169 ...

Page 182

... VI Not used Not used Not used Not used Not used PM73487 QRT 101). 101). 15:8 7:0 VCI(3:0), PTI, CLP payload 3 payload 7 payload 11 payload 15 payload 19 payload 23 payload 27 payload 31 payload 35 payload 39 payload 43 payload 47 ...

Page 183

... Not used Not used Not used Not used Not used Not used PM73487 QRT 101). 101). 15:8 7:0 VCI(3:0), PTI, CLP payload 3 payload 7 payload 11 payload 15 payload 19 payload 23 payload 27 payload 31 payload 35 payload 39 payload 43 ...

Page 184

... Index Number of entries: 128 (eight cells) Type: Read/Write during SW_RESET (refer to Format: Refer to the following table. Field (Bits) RX_SWITCH_ELEMENT_RAM Test access to the RS_RAM. (31:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device byte) h “SW_RESET” on page Description PM73487 QRT 101). 172 ...

Page 185

... Description Name Contains the address lookup tables, linked lists, and multicast pointer FIFOs. Contains the channel tables. Contains the head and tail pointers for the receive channel queues. Receive buffer SDRAM/SGRAM. Transmit buffer SDRAM/SGRAM. PM73487 QRT 101). Description 173 ...

Page 186

... Service Order Con- R/W trol Block (internal h structure PM73487 QRT Description The first lookup is to this table. For VPCs, this lookup deter- mines the channel number directly. For VCCs, this deter- mines the number of VCI bits to use and the start of a block in the channel number table ...

Page 187

... Indicates the entry is a valid VPC. Initialize to the proper setting. (15) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device (800000 byte Shift_left ((VI mod VI_CONF), NUM_VPI mod h “NUM_VI” on page If NUM_VI = 0 1 NUM_VPI = 11 NUM_VPI = 12 NUM_VPI = 12 NUM_VPI = 12 Description Description PM73487 QRT 104. 2 NUM_VPI = 8 NUM_VPI = 9 NUM_VPI = 10 NUM_VPI = 12 175 ...

Page 188

... Write with maintain software compatibility with future versions. (15:14) RX_CHAN_NUM The receive channel number. (13:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description “AL_RAM_CONFIG” on page “AL_RAM_CONFIG” on page 105): Description PM73487 QRT 105 then BLOCK_OFFSET(10 Oth- h (808000 byte (810000 byte (820000 byte) ...

Page 189

... R/W (init only) For the input FIFO, this is the OUTCHAN from the cell. For the output FIFO, this is the pointer to the entry in the MC header translation table for this entry. R/W (init only) Pointer to the cell buffer containing the multicast cell to be replicated. PM73487 QRT 105): (818000 byte). h (840000 byte) ...

Page 190

... Format: Refer to the following table. Field (Bits) Not present RAM is not present in these bit locations. (31:16) MC_CELL_PTR The pointer to the cell buffer containing the multicast cell to be replicated. (15:0) PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device “SW_RESET” on Description “SW_RESET” on Description PM73487 QRT 178 ...

Page 191

... Description in the first location. h PM73487 QRT (838000 byte (870000 byte (8C0000 byte (9C0000 byte “SW_RESET” on ...

Page 192

... If the Arriving Cell is Unicast Description in the first location Arriving Cell is Multicast Description The background processor is still queuing cells. The background processor has finished queuing this cell. PM73487 QRT (830000 byte (860000 byte (8A0000 byte). ...

Page 193

... Table of the SC to serve if there are no cells in any of the strict SCs for the transmit direction for VO = Index. R/W Table of the SC to serve if there are no cells in any of the strict SCs for the receive direction. th entry is not used). Description PM73487 QRT (80C000 byte (820000 byte (840000 byte) ...

Page 194

... Not used Write with maintain software compatibility with future versions. (15:6) FIRST_SC SC to service if there are no strict service cells. To create a null entry, enter one of the (5:0) strict SCs. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description PM73487 QRT 182 ...

Page 195

... Initialize initial setup. Software modifications to this location only) after setup may cause incorrect operation. R/W (init State of the sequencing algorithm. only) R/W Write with maintain software compatibility with future versions. R/W Overall controls for the channel. PM73487 QRT 622 Mbps ATM Traffic Management Device Description 105) + RX_CHAN_NUM OUTCHAN 10 ...

Page 196

... Enables CLP dropping when either the channel, the SC, or the device is in the congested state. 0 Disables CLP dropping above the congestion threshold. Write with maintain software compatibility with future versions. PM73487 QRT 622 Mbps ATM Traffic Management Device Description 187) to: limits this ...

Page 197

... For RX_CH_SERVICE_CLASS from Reserved. h The above settings are highly recommended for unicast service classes (00 to 1F) The above settings are REQUIRED for the multicast service classes (20 - 3F) to Description Table starting on page PM73487 QRT Table on page 91 this 189). Table on page 91 ...

Page 198

... Initialize to the proper setting. PMC-Sierra, Inc. 622 Mbps ATM Traffic Management Device Description Set enable the marked cell counters. Set create even parity. Set create odd parity to test the parity checker on the transmit side. Description PM73487 QRT 186 ...

Page 199

... The last cell received was an end-of-frame The last cell was dropped Undefined This field is maintained by a state machine and is read-only after initial This channel is currently congested. 0 This channel is currently not congested. Description PM73487 QRT . This field is maintained by a state 187 ...

Page 200

... Cell Allowed to be Outstanding) b Description 00 RX_CH_SEQ_CELL_PTR0 is empty RX_CH_SEQ_CELL_PTR0 is currently pending transmission RX_CH_SEQ_CELL_PTR0 received an ONACK on last transmission RX_CH_SEQ_CELL_PTR0 received an ACK on last transmission. b (Two Cells Allowed to be Outstanding) b Description (19:18) State bits for RX_CH_SEQ_CELL_PTR1. (17:16) State bits for RX_CH_SEQ_CELL_PTR0. PM73487 QRT 188 ...

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