K4S561632E-UC60 Samsung, K4S561632E-UC60 Datasheet
K4S561632E-UC60
Related parts for K4S561632E-UC60
K4S561632E-UC60 Summary of contents
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... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) 256Mb E-die SDRAM Specification 54 TSOP-II with Pb-Free * Samsung Electronics reserves the right to change products or specification without notice. (RoHS compliant) Revision 1.3 August 2004 CMOS SDRAM Rev. 1.3 August 2004 ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) Revision History Revision 1.0 (May. 2003) - First generation for Pb_free products Revision 1.1 (August. 2003) - Corrected typo in Page #8, 9 Revision 1.2 (May. 2004) - ...
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... RoHS compliant GENERAL DESCRIPTION The K4S560432E / K4S560832E / K4S561632E is 268,435,456 bits synchronous high data rate Dynamic RAM organized 16,785,216 / 4 x 8,392,608 / 4 x 4,196,304 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology. Synchro- nous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of oper- ating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 ± 0.10 ± 0.004 0.875 0.008 +0.10 0.30 0.80 -0.05 ...
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... ADD LCKE LRAS LCBR CLK CKE * Samsung Electronics reserves the right to change products or specification without notice. Data Input Register 16M 16M 16M 16M Column Decoder Latency & ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in PS CKE ...
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... Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S561632E-UC 4. K4S561632E-UL 5. Unless otherwise noticed, input swing level is CMOS 70°C) A Test Condition Burst length = 1 ≥ (min ≤ ...
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... Minimum delay is required to complete write. 3. All parts allow every cycle column address change case of row precharge interrupt, auto precharge and read burst stop 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported. SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP. = 3.3V ± 0.3V 3.3V 1200Ω ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CLK to valid output delay Output data hold time CLK high pulse width CLK low pulse ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage 133MHz 133MHz Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 ...
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SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Exit Bank active & row addr. Read & Auto precharge disable column address Auto ...