W9816G6CB-7 Winbond, W9816G6CB-7 Datasheet
W9816G6CB-7
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W9816G6CB-7 Summary of contents
Page 1
... Precharge Command.................................................................................................... 10 7.16 Self Refresh Command ................................................................................................ 10 7.17 Power Down Mode ....................................................................................................... 11 7.18 No Operation Command............................................................................................... 11 7.19 Deselect Command ...................................................................................................... 11 7.20 Clock Suspend Mode.................................................................................................... 11 8. OPERATION MODE ................................................................................................................. 12 9. ELECTRICAL CHARACTERISTICS......................................................................................... 13 9.1 Absolute Maximum Ratings .......................................................................................... 13 9.2 Recommended DC Operating Conditions .................................................................... 13 512K × 2 BANKS × 16 BITS SDRAM Publication Release Date: Aug. 23, 2007 - 1 - W9816G6CB Revision A3 ...
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... Timing Chart of Burst Stop Cycle (Burst Stop Command).......................................... 38 11.20 Timing Chart of Burst Stop Cycle (Precharge Command).......................................... 38 11.21 CKE/DQM Input Timing (Write Cycle)......................................................................... 39 11.22 CKE/DQM Input Timing (Read Cycle)......................................................................... 40 12. PACKAGE SPECIFICATION .................................................................................................... 41 12.1 VFBGA60Ball (6.4X10.10 mm,Ball pitch:0.65mm, Ø=0.4mm)..................................... 41 13. REVISION HISTORY ................................................................................................................ 42 Publication Release Date: Aug. 23, 2007 - 2 - W9816G6CB Revision A3 ...
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... Auto-precharge and controlled precharge • 4K refresh cycles/64 mS • Interface: LVTTL • Package: VFBGA 60 balls pitch=0.65mm, using Pb free with RoHS compliant 3. AVAILABLE PART NUMBER PART NUMBER W9816G6CB-6 W9816G6CB-7 SPEED (CL=3) SELF REFRESH CURRENT (MAX.) 166MHz 143MHz - 3 - W9816G6CB 2mA 2mA Publication Release Date: Aug. 23, 2007 ...
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... DQ7 WE# WE# CAS# CAS# CS# CS A10 A10 VDD VDD W9816G6CB Bottom View 2 1 DQ0 DQ15 Vss VDDQ VssQ DQ14 VssQ VDDQ DQ13 DQ4 DQ11 DQ12 VDDQ VssQ DQ10 VssQ VDDQ DQ9 NC NC DQ8 NC NC ...
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... DRAM. Separated power from V I/O buffer to improve noise immunity. Ground for I/O Separated ground from V buffer to improve noise immunity. No connection. (NC pin should be connected to GND No Connection or floating W9816G6CB DESCRIPTION , and define the RAS CAS WE RAS RAS , used for output buffers CC , used for output buffers SS Publication Release Date: Aug ...
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... CELL ARRAY D BANK # SENSE AMPLIFIER DATA CONTROL CIRCUIT COLUMN DECODER CELL ARRAY D E BANK # SENSE AMPLIFIER Note: The cell array configuration is 2048 * 256 * 16 Publication Release Date: Aug. 23, 2007 - 6 - W9816G6CB DQ0 DQ BUFFER DQ15 LDQM UDQM Revision A3 ...
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... After power up, an initial pause of 200 µ activate in EDO DRAM. The delay from when the Bank Activate ). The maximum time that each bank can be held active is RRD - 7 - W9816G6CB delay. WE pin voltage level RCD Publication Release Date: Aug. 23, 2007 Revision A3 RSC ). ...
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... A Burst Stop Command may be used to terminate the existing burst operation but leave the bank open for future Read or Write Commands to the same page of the active bank, if the burst length is full page. Use of the Burst Stop Command during other burst length operations is illegal. The Burst Stop Publication Release Date: Aug. 23, 2007 - 8 - W9816G6CB Revision A3 ...
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... (disturb addresses are A0 and A1) No address carry from (disturb addresses are A0, A1 and A2) No address carry from ACCESS ADDRESS W9816G6CB BURST LENGTH BURST LENGTH Publication Release Date: Aug. 23, 2007 ...
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... Auto-Refresh cycles should be completed just prior to entering and just after exiting the Self-Refresh mode. ) has been satisfied. Issue of Auto-precharge command is RP and When using the Auto-precharge Command, the interval W9816G6CB . The bank WR are satisfied. This is referred Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... The Clock Suspend mode is exited by bringing CKE high. There is a one-clock cycle delay from when CKE returns high to when Clock Suspend mode is exited. . The input buffers need (min (min). CKS CK Publication Release Date: Aug. 23, 2007 - 11 - W9816G6CB ) of the REF Revision A3 ...
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... W9816G6CB A10 A9-A0 RAS CAS ...
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... CCQ OPR T -55 ~ 150 STG T 260 SOLDER OUT SYM. MIN 3.0 CCQ V 2.7 CCQ RAS CAS W9816G6CB UNIT NOTES + 0 °C °C ° TYP. MAX. UNIT NOTES 3.3 3.6 V 3.3 3.6 V 3.3 3.6 V 3 0.8 V SYM. MIN. MAX ...
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... CKE = CC2PS (Power Down mode) CKE = CC3 CKE = CC3P (Power Down mode) I CC4 I CC5 I CC6 SYM. I I( W9816G6CB -6 -7 UNIT NOTES MAX. MAX 110 100 MIN. ...
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... 1.5 CKS t 0.7 CKH t 1.5 CMS t 0.7 CMH t 64 REF t 12 RSC t 72 XSR Publication Release Date: Aug. 23, 2007 - 15 - W9816G6CB -7 UNIT NOTES MIN. MAX 100000 1000 nS 7 1000 5 2 ...
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... T 10. If clock rising time ( longer than 1nS 1 ohms AC TEST LOAD and 1nS. T /2-0.5)nS should be added to the parameter W9816G6CB CONDITIONS 1.4V See diagram below 2.4V/0.4V 1/1 nS 1.4V 50 ohms 30pF Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... IL CS RAS CAS WE A0-A10 CKS CKH CKE t t CMS CMH t t CMS CMH t t CMS CMH t t CMS CMH CKS CKH t CKS - 17 - W9816G6CB CMH CMS t CKH Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... Read Timing CLK CS RAS CAS WE A0-A10 BA DQ Read Command Read CAS Latency Valid Data-Out Publication Release Date: Aug. 23, 2007 - 18 - W9816G6CB Valid Data-Out Burst Length Revision A3 ...
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... CMS Valid Valid Data-Out Data-Out CKS CKH CKS Valid Valid Data-Out Data-Out - 19 - W9816G6CB Valid Valid Data-in Data- Valid Valid Data-in Data- ...
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... Reserved A0 A9 Single Write Mode A0 0 Burst read and Burst write Burst read and single write Publication Release Date: Aug. 23, 2007 - 20 - W9816G6CB next command Interleave Reserved A0 2 Revision A3 ...
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... RP t RAS t t RCD RCD RBb RAc CBx RBb RAc t AC bx1 aw0 aw1 aw2 aw3 bx0 t RRD Precharge Active Precharge Active Read - 21 - W9816G6CB RAS RAS t RCD RBd CAy RBd CBz t AC ...
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... RAS t RCD t RCD RAc CBx RAc aw0 aw1 aw2 aw3 bx0 bx1 t RRD AP* Active Read - 22 - W9816G6CB RAS RAS t RCD RBd RAe CBz CAy RAe RBd ...
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... RAS RAS t RCD RBb RBb CBy ax0 ax1 ax2 ax3 ax4 ax5 ax6 by0 t RRD Precharge Active Read - 23 - W9816G6CB RAS RCD RAc RAc CAz t AC by1 by4 by5 by6 by7 CZ0 ...
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... RAS RP t RCD RBb RBb CBy CAC ax3 ax4 ax0 ax1 ax2 ax5 ax6 ax7 t RRD AP* Read Active * AP is the internal precharge start timing - 24 - W9816G6CB RAS t t RAS RP t RCD RAc CAz RAc t CAC ...
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... RAS t RCD RBb RBb CBy ax4 ax5 ax6 ax7 by0 by1 by2 by3 t RRD Precharge Active Write - 25 - W9816G6CB RAS RCD RAc RAc CAz by4 by5 by6 by7 CZ0 CZ1 Active Write Precharge Publication Release Date: Aug ...
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... RC t RAS t RCD RBb CBy RBb ax4 by2 ax5 ax6 ax7 by0 by1 t RRD AP* Active Write * AP is the internal precharge start timing - 26 - W9816G6CB RAS t RAS t RCD RAb CAz RAc by5 by3 by4 by6 by7 CZ0 ...
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... RAS t RCD CAm CBx CAy bx0 bx1 Ay0 Ay1 Ay2 Read Read Read * AP is the internal precharge start timing - 27 - W9816G6CB CBz am0 am1 am2 bz0 bz1 bz2 bz3 ...
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... Read Bank # RAS CAy ax5 ay1 ax0 ax1 ax2 ax3 ax4 ay0 Write - 28 - W9816G6CB ay2 ay3 ay4 Precharge Publication Release Date: Aug. 23, 2007 Revision A3 23 ...
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... RCD RAb RAb aw0 aw1 aw2 aw3 AP* Active * AP is the internal precharge start timing - 29 - W9816G6CB RAS RP CAx t AC bx0 bx1 bx2 Read AP* Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... MHz RCD RAb RAb CAx bx0 aw3 Active Write AP the internal precharge start timing - 30 - W9816G6CB RAS RP RAc RAc bx1 bx3 bx2 AP* Active Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... CLK RAS CAS WE BA A10 A0-A9 DQM CKE DQ All Banks Auto Prechage Refresh (CLK = 100 MHz W9816G6CB Auto Refresh (Arbitrary Cycle) Publication Release Date: Aug. 23, 2007 Revision A3 23 ...
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... CKS DQ All Banks Self Refresh Precharge Entry (CLK = 100 MHz CKS SB Self Refresh Cycle Self Refresh Exit - 32 - W9816G6CB CKS t XSR No Operation / Command Inhibit Arbitrary Cycle Publication Release Date: Aug. 23, 2007 Revision A3 23 ...
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... Bank # CBw CBx CBy av0 av1 av3 aw0 ax0 ay0 av2 Single Write - 33 - W9816G6CB CBz t AC az0 az1 az2 az3 Read Publication Release Date: Aug. 23, 2007 Revision A3 23 ...
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... Violating refresh requirements during power-down may result in a loss of data CAa t CKS ax0 ax2 ax3 ax1 Read Precharge - 34 - W9816G6CB RAa RAa CAx CKS NOPActive Precharge Standby Power Down mode Publication Release Date: Aug. 23, 2007 ...
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... Act represents the Read with Auto precharge command. represents the start of internal precharging. represents the Bank Activate command W9816G6CB Act Act AP Act (min). RAS Publication Release Date: Aug ...
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... AP tRP tWR represents the Write with Auto precharge command. represents the start of internal precharing. represents the Bank Active command W9816G6CB Act tRP tWR Act Act AP Act tRP tWR Publication Release Date: Aug. 23, 2007 ...
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... Note: The Output data must be masked by DQM to avoid I/O conflict Read Read Read Read W9816G6CB Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... Q2 Q3 BST Note: BST represents the Burst stop command PRCG PRCG PRCG tWR PRCG tWR W9816G6CB Publication Release Date: Aug. 23, 2007 Revision A3 11 ...
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... CLK cycle No. External CLK Internal CKE DQM DQM MASK ( DQM MASK CKE MASK ( CKE MASK ( W9816G6CB CKE MASK Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... External CLK Internal CKE DQM CLK cycle No. External CLK Internal CKE DQM W9816G6CB Open Open Open Publication Release Date: Aug. 23, 2007 Revision A3 ...
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... PACKAGE SPECIFICATION 12.1 VFBGA60Ball (6.4X10.10 mm,Ball pitch:0.65mm, Ø=0.4mm) Publication Release Date: Aug. 23, 2007 - 41 - W9816G6CB Revision A3 ...
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... Add -6 speed grade 41 Change ball dimension description. 1. Add t timing specification. XSR 2. Add AC Characteristics Notes 9 and Revise transient time t AC Characteristics and Operating Condition. Important Notice - 42 - W9816G6CB DESCRIPTION ). T AC test condition in Notes Publication Release Date: Aug. 23, 2007 Revision A3 ...