LTC6421IUDC-20#PBF Linear Technology, LTC6421IUDC-20#PBF Datasheet - Page 7

IC ADC DRIVER DIFF 20-QFN

LTC6421IUDC-20#PBF

Manufacturer Part Number
LTC6421IUDC-20#PBF
Description
IC ADC DRIVER DIFF 20-QFN
Manufacturer
Linear Technology
Type
ADC Driverr
Datasheet

Specifications of LTC6421IUDC-20#PBF

Applications
Data Acquisition
Mounting Type
Surface Mount
Package / Case
20-QFN
No. Of Amplifiers
2
Input Offset Voltage
2mV
Gain Db Max
20dB
Bandwidth
1.3GHz
Slew Rate
4500V/µs
Supply Voltage Range
2.85V To 3.5V
Supply Current
40mA
Amplifier Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC6421IUDC-20#PBFLTC6421IUDC-20
Manufacturer:
LT
Quantity:
10 000
Company:
Part Number:
LTC6421IUDC-20#PBF
Manufacturer:
AD
Quantity:
250
Company:
Part Number:
LTC6421IUDC-20#PBFLTC6421IUDC-20#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
PIN FUNCTIONS
+INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential
Inputs of A and B channel respectively.
V
four pins, as well as the exposed back, must be connected
to same voltage/ground.
ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low,
the amplifi er is enabled. If high, the amplifi er is disabled
and placed in a low-power shutdown mode, making
the amplifi er outputs high impedance. These pins are
internally separate. These pins should not be left
fl oating.
V
(Normally tied to 3V or 3.3V). Supply pins of A and B channels
are internally separate. Bypass each pin with 1000pF and
0.1μF capacitors as close to the pins as possible.
BLOCK DIAGRAM
+
A , V
(Pins 3, 4, 13, 14, 21): Negative Power Supply. All
+
B (Pins 15, 20, 7, 12 ): Positive Power Supply
+INA
–INA
–INB
+INB
V –
V –
1
2
3
4
5
6
100Ω
100Ω
100Ω
100Ω
R
R
R
R
G
G
G
G
V
V
20
+
7
+
A
B
V
V
+
+
OCMA
OCMB
19
8
1000Ω
1000Ω
1000Ω
R
R
+
R
+
F
F
F
ENABLEA
ENABLEB
–OUTA, +OUTA, –OUTB, +OUTB (Pins 16, 17, 11, 10):
Differential Outputs of channels A and B respectively.
V
common mode voltage for the respective channel. They
are internally separate. A 0.1μF external bypass capacitor
is recommended.
Exposed Pad (Pin 21): V
connected to same voltage/ground as pins 3, 4, 13, 14.
18
9
OCMA
12.5Ω
12.5Ω
12.5Ω
12.5Ω
R
R
R
R
OUT
OUT
OUT
OUT
, V
OCMB
+OUTB
+OUTA
10
17
(Pins 19, 8): These pins set the output
642120 BD
16
15
14
13
12
11
–OUTA
V
V –
V –
V
–OUTB
+
+
A
B
. The Exposed Pad must be
LTC6421-20
642120fb
7

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