FSAM50SM60ANBSP Fairchild Semiconductor, FSAM50SM60ANBSP Datasheet - Page 14

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FSAM50SM60ANBSP

Manufacturer Part Number
FSAM50SM60ANBSP
Description
Manufacturer
Fairchild Semiconductor
Datasheet
©2006 Fairchild Semiconductor Corporation
Note:
1) R
2) By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is
3) V
4) C
5) V
6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7k : (at high side input) or 2k : at low side input) resistance (other RC
7) To prevent errors of the protection function, the wiring around R
8) In the short-circuit protection circuit, please select the R
9) Each capacitor should be mounted as close to the pins of the SPM as possible.
10)To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-
11)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and
SPM input pin.
possible.
refer to Fig. 12.
t
coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board).
Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals.
inductive capacitor of around 0.1~0.22 P F between the P&N pins is recommended.
the relays. It is recommended that the distance be 5cm at least.
FO
PL
FO
SP15
FO
C
= 1.8 ms (typ.)) Please refer to the note 6 for calculation method.
output pulse width should be determined by connecting an external capacitor(C
output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k : resistance. Please
PL
of around 7 times larger than bootstrap capacitor C
/R
Gating WH
Gating WH
PH
Gating VH
Gating UH
Gating VH
Gating UH
Fault
C
PH
/R
PF
C
PF
C
BPF
R
R
R
R
R
R
R
S
S
S
S
S
coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each
S
S
R
PL
R
5V line
C
PL
PL
R
C
PL
PL
R
C
PF
PL
5V line
C
Temp. Monitoring
PF
R
C
PH
R
PH
C
PH
R
PH
15V line
C
PH
PH
F
C
Fig. 14. Application Circuit
BS
SC
R
R
R
BS
BS
BS
C
is recommended.
time constant in the range 3~4 P s.
SC
R
SC
SC
D
D
D
C
C
R
BS
BS
BS
BS
BS
, R
F
F
C
C
R
BSC
C
and C
BSC
CSC
FOD
(14) V
SC
(22) V
(21) V
(20) IN
(23) V
(18) V
(17) V
(13) V
(12) V
(11) IN
(10) R
(16) COM
(15) IN
(19) V
W-Phase Current
V-Phase Current
U-Phase Current
(8) C
(7) V
(6) COM
(5) IN
(4) IN
(3) IN
(2) COM
(1) V
(9) C
should be as short as possible.
B(W)
CC(WH)
S(W)
B(V)
CC(VH)
B(U)
CC(UH)
S(U)
FO
CC(L)
SC
SC
FOD
S(V)
(UH)
(WL)
(VL)
(UL)
(WH)
(VH)
(L)
(L)
(H)
FOD
) between C
VB
VCC
COM
IN
VB
VCC
COM
VB
VCC
COM
IN
C(SC)
C(FOD)
VFO
IN(WL)
IN(VL)
IN(UL)
COM(L)
VCC
IN
OUT(WL)
OUT(VL)
OUT(UL)
FOD
OUT
OUT
OUT
VS
VS
VS
R
R
R
E(WH)
E(VH)
E(UH)
C
(pin8) and COM
FW
THERMISTOR
C
FV
C
FU
(L)
(pin2). (Example : if C
R
V
N
N
R
W (31)
N
R
P (32)
TH
R
V (30)
U (29)
TH
W
V
U
FW
FV
FU
(27)
(26)
(24)
(25)
(28)
R
TH
R
R
R
SW
SU
SV
C
SPC05
FOD
C
5V line
DCS
C
= 33 nF, then
SP05
Vdc
xxxxx
xxxxx
April 3, 2006

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