ADP3418 Analog Devices, ADP3418 Datasheet

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ADP3418

Manufacturer Part Number
ADP3418
Description
Manufacturer
Analog Devices
Datasheet

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FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
1 PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to float the
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
output per Intel® VRM 10 and AMD Opteron specifications
IN
2
ADP3418
S
R
1V
Q
Q
CMP
DELAY
DELAY
FUNCTIONAL BLOCK DIAGRAM
CMP
VCC
6
OD
3
Figure 1.
C
VCC
Dual Bootstrapped 12 V MOSFET
GENERAL DESCRIPTION
The ADP3418 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a
nonisolated, synchronous, buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 30 ns transition
time. One of the drivers can be bootstrapped, and is designed to
handle the high voltage slew rate associated with floating high-
side gate drivers. The ADP3418 includes overlapping drive
protection to prevent shoot-through current in the external
MOSFETs. The OD pin shuts off both the high-side and the
low-side MOSFETs to prevent rapid output capacitor discharge
during system shutdowns.
The ADP3418 is specified over the commercial temperature
range of 0°C to 85°C, and is available in an 8-lead SOIC
package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
4
VCC
1
8
7
5
6
Driver with Output Disable
BST
DRVH
SW
DRVL
PGND
C
R
BST1
BST1
D1
© 2004 Analog Devices, Inc. All rights reserved.
R
G
C
BST2
12V
Q1
Q2
TO
INDUCTOR
ADP3418
www.analog.com

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ADP3418 Summary of contents

Page 1

... Dual Bootstrapped 12 V MOSFET GENERAL DESCRIPTION The ADP3418 is a dual, high voltage MOSFET driver optimized for driving two N-channel MOSFETs, the two switches in a nonisolated, synchronous, buck power converter. Each of the drivers is capable of driving a 3000 pF load with transition time ...

Page 2

... ADP3418 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Timing Characteristics..................................................................... 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ........................................................................ 9 Low-Side Driver............................................................................ 9 High-Side Driver .......................................................................... 9 REVISION HISTORY 8/04—Data Sheet Changed from Rev Rev. B Updated Figure 1; Deleted Figure 2.....................................................1 Updated Specifications Table ...............................................................3 Updated Pin Description ...

Page 3

... See Figure rDRVL LOAD t See Figure fDRVL LOAD t See Figure 4 pdhDRVL t See Figure 4 pdlDRVL PGND refers to it going low. pdl Rev Page ADP3418 Min Typ Max Unit 4.15 13 2.6 V 0.8 V –1 +1 µ ...

Page 4

... ADP3418 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VCC BST DC <200 ns BST < 200 ns DRVH DRVL (< 200 ns) All Other Inputs and Outputs Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Junction-to-Air Thermal Resistance (θ 2-Layer Board 4-Layer Board ...

Page 5

... This pin is connected to the buck switching node, close to the upper MOSFET’s source the floating return for the upper MOSFET drive signal. 8 DRVH Buck Drive. Output drive for the upper (buck) MOSFET. BST DRVH 1 8 AD3418 TOP VIEW OD PGND 3 6 (Not to Scale) VCC DRVL 4 5 Figure 2. Pin Configuration Rev Page ADP3418 ...

Page 6

... ADP3418 TIMING CHARACTERISTICS OD DRVH OR DRVL IN t pdlDRVL DRVL DRVH-SW SW Figure 4. Timing Diagram. Timing is referenced to the 90% and 10% points, unless otherwise noted pdlOD pdhOD 90% 10% Figure 3. Output Disable Timing Diagram t t fDRVL pdlDRVH t t pdhDRVH rDRVH V TH Rev Page rDRVL ...

Page 7

... DRVL 100 125 1 Figure 10. DRVH and DRVL Fall Times vs. Load Capacitance Rev Page 12V = 3nF 100 JUNCTION TEMPERATURE (°C) = 25°C = 12V DRVH DRVL LOAD CAPACITANCE (nF) = 25°C = 12V LOAD CAPACITANCE (nF) ADP3418 DRVL DRVH 125 5 DRVL DRVH 5 ...

Page 8

... ADP3418 25° 12V 3nF LOAD 200 400 600 800 IN FREQUENCY (kHz) Figure 11. Supply Current vs. Frequency 12V 3nF LOAD f = 250kHz JUNCTION TEMPERATURE (°C) Figure 12. Supply Current vs. Temperature ...

Page 9

... N-channel MOSFET. The bias to the low-side driver is internally connected to the VCC supply and PGND. When the driver is enabled, the driver’s output is 180 degrees out of phase with the PWM input. When the ADP3418 is dis- abled, the low-side gate is held low. HIGH-SIDE DRIVER The high-side driver is designed to drive a floating N-channel MOSFET ...

Page 10

... ADP3418 APPLICATION INFORMATION SUPPLY CAPACITOR SELECTION For the supply input (VCC) of the ADP3418, a local bypass capacitor is recommended to reduce the noise and to supply some of the peak currents drawn. Use a 4.7 µF, low ESR capacitor. Multilayer ceramic chip (MLCC) capacitors provide the best combination of low ESR and small size. Keep the ceramic capacitor as close as possible to the ADP3418 ...

Page 11

... This usually implies a large input gate capacitance and gate charge. The first concern is to make sure the power delivery from the ADP3418’s DRVL does not exceed the thermal rating of the driver (see the Flex- mode controller data sheet for details). ...

Page 12

... Figure 14 shows an example of the typical land patterns based on the guidelines given previously. For more detailed layout guidelines for a complete CPU voltage regulator subsystem, refer to the ADP3188 data sheet. C BST1 C BST2 D1 C VCC Figure 14. External Component Placement Example for the ADP3418 Driver Rev Page BST ...

Page 13

... Figure 15. VRD 10.x Compliant Intel CPU Supply Circuit Rev Page ADP3418 ...

Page 14

... ADP3418 OUTLINE DIMENSIONS ORDERING GUIDE Model 1 ADP3418KRZ 1 ADP3418KRZ–REEL Pb-free part. 5.00 (0.1968) 4.80 (0.1890 6.20 (0.2440) 4.00 (0.1574) 5.80 (0.2284) 3.80 (0.1497 1.27 (0.0500) BSC 1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) COPLANARITY 0.25 (0.0098) 0.31 (0.0122) SEATING 0.10 0.17 (0.0067) PLANE COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS ...

Page 15

... NOTES Rev Page ADP3418 ...

Page 16

... ADP3418 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03229–0–8/04(B) Rev Page ...

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