DS1994L-F5+ Maxim Integrated Products, DS1994L-F5+ Datasheet
DS1994L-F5+
Related parts for DS1994L-F5+
DS1994L-F5+ Summary of contents
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... Reader First Applies Voltage Meets UL#913 (4th Edit.); Intrinsically Safe Apparatus, Approved under Entity Concept for Use in Class I, Division 1, Group and D Locations ORDERING INFORMATION DS1994L-F5+ F5 MicroCan +Denotes a lead(Pb)-free/RoHS-compliant package. EXAMPLES OF ACCESSORIES DS9096P Self-Stick Adhesive Pad DS9101 Multi-Purpose Clip ...
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DESCRIPTION The DS1994 Memory iButton is a rugged read/write data carrier that acts as a localized database, easily accessible with minimal hardware. The nonvolatile memory and optional timekeeping capability offer a simple solution to storing and retrieving vital information ...
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Figure 1. DS1994 BLOCK DIAGRAM ROM 1-WIRE FUNCTION 1-W PORT CONTROL MEMORY FUNCTION CONTROL 3V LITHIUM 32.768 kHz OSCILLATOR INTERNAL REGISTERS PARASITE POWER The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry steals power whenever the data input ...
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Figure 3. 1-WIRE CRC CODE STAGE STAGE STAGE MEMORY The memory map in Figure 4 shows a 32-Byte page called the scratchpad, and additional 32-Byte pages ...
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Figure 4. DS1994 MEMORY MAP SCRATCHPAD PAGE PAGE 0 PAGE 1 PAGE 2 PAGE 3 PAGE 4 PAGE 5 PAGE 6 PAGE 7 PAGE 8 MEMORY PAGE 9 PAGE 10 PAGE 11 PAGE 12 PAGE 13 PAGE 14 PAGE 15 ...
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Interval Timer The interval timer is a 5-Byte binary counter. When enabled incremented 256 times per second. The least significant Byte is a count of fractional seconds. The interval timer can accumulate 136 years of seconds before rolling ...
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When a given alarm occurs, the corresponding alarm flag is set to a logic 1. The alarm flag is cleared by reading the status register. 3 RTE Real-time clock alarm flag 4 ITE Interval timer alarm flag 5 CCE Cycle ...
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STOP/START Stop/Start (in manual mode) If the interval timer is in manual mode, the interval timer starts counting when this bit is set to a logic 0 and stops counting when set to a logic 1. If the interval ...
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Write Scratchpad Command [0Fh] After issuing the write scratchpad command, the user must first provide the 2-Byte target address, followed by the data to be written to the scratchpad. The data is written to the scratchpad starting at the Byte ...
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Figure 6. MEMORY FUNCTIONS FLOWCHART Master TX Memory Function Command 0FH Write Scratchpad Bus Master TX TA1 (T7:T0) Bus Master TX TA2 (T15:T8) DS1994 sets Scratchpad Offset = (T4:T0) and Clears (PF, OF, AA) Master TX Data Byte To Scratchpad ...
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Figure 6. MEMORY FUNCTIONS FLOWCHART (continued) From Figure 6 55H Copy Scratchpad First Part ? Y Bus Master TX TA1 (T7:T0) Bus Master TX TA2 (T15:T8) Bus Master TX E/S Byte Auth. Code Match ? DS1994 ...
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MEMORY FUNCTION EXAMPLES Example: Write two data Bytes to memory locations 0026h and 0027h (the seventh and eighth Bytes of page 1). Read entire memory. MASTER MODE DATA (LSB FIRST ...
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WRITE PROTECT/PROGRAMMABLE EXPIRATION The write protect bits (WPR, WPI, WPC) provide a means of write protecting the timekeeping data and limiting access to the DS1994 when an alarm occurs (programmable expiration). The write protect bits cannot be written by performing ...
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Figure 8. HARDWARE CONFIGURATION BUS MASTE Open Drain Port Pin TRANSACTION SEQUENCE The protocol for accessing the DS1994 through the 1-Wire port is as follows: Initialization ROM Function Command Memory Function Command Transaction/Data ...
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Figure 9. ROM FUNCTIONS FLOWCHART 33H 55H N Read ROM Match ROM Command Command ? ? Y DS1994 TX Fam ily Code Master TX Bit 0 1 Byte Bit 0 Match ? DS1994 TX Serial Num ber Master TX Bit ...
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Skip ROM [CCh] This command can save time in a single drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus ...
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Figure 10. INITIALIZATION PROCEDURE RESET AND PRESENCE PULSES MASTER TX "RESET PULSE" V PULLUP V PULLUP MIN V IH MIN V IL MAX 0V RESISTOR MASTER DS1994 Figure 11. READ/WRITE TIMING DIAGRAM Write-One Time Slot V PULLUP V PULLUP MIN ...
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Figure 11. READ/WRITE TIMING DIAGRAM (continued) Write-Zero Time Slot V PULLUP V PULLUP MIN V IH MIN V IL MAX 0V RESISTOR MASTER Read-Data Time Slot V PULLUP V PULLUP MIN V IH MIN V IL MAX 0V RESISTOR MASTER ...
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Spontaneous interrupts are signaled by the DS1994 by pulling the data line low for 960 3840 the interrupt condition begins (Figure 12). After this long low pulse, a presence pulse follows. If the alarm ...
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Figure 13. TYPE 1A INTERRUPT (SPECIAL CASE 1-W IRE ...
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PHYSICAL SPECIFICATIONS Size Weight Expected Service Life Safety ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature * This is a stress rating only, and functional operation of the device at these or any other ...
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Note 1: All voltages are referenced to ground. Note external pullup voltage, see Figure 8. PUP Note 3: Input load is to ground. Note 4: An additional reset or communication sequence cannot begin until the reset high ...
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